x86/mm: Switch to new Intel CPU model defines
authorTony Luck <tony.luck@intel.com>
Wed, 24 Apr 2024 18:15:18 +0000 (11:15 -0700)
committerBen Hutchings <benh@debian.org>
Thu, 3 Oct 2024 21:58:46 +0000 (23:58 +0200)
commit 2eda374e883ad297bd9fe575a16c1dc850346075 upstream.

New CPU #defines encode vendor and family as well as model.

[ dhansen: vertically align 0's in invlpg_miss_ids[] ]

Signed-off-by: Tony Luck <tony.luck@intel.com>
Signed-off-by: Dave Hansen <dave.hansen@linux.intel.com>
Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de>
Link: https://lore.kernel.org/all/20240424181518.41946-1-tony.luck%40intel.com
[ Ricardo: I used the old match macro X86_MATCH_INTEL_FAM6_MODEL()
  instead of X86_MATCH_VFM() as in the upstream commit.
  I also kept the ALDERLAKE_N name instead of ATOM_GRACEMONT. Both refer
  to the same CPU model. ]
Signed-off-by: Ricardo Neri <ricardo.neri-calderon@linux.intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Gbp-Pq: Topic bugfix/x86
Gbp-Pq: Name x86-mm-switch-to-new-intel-cpu-model-defines.patch

arch/x86/mm/init.c

index dd15fdee4536645e28603aa73bf9c5ed0fcd6ad2..17f1a89e26fc4592fd79ddad4803e24b8fb713b7 100644 (file)
@@ -257,21 +257,17 @@ static void __init probe_page_size_mask(void)
        }
 }
 
-#define INTEL_MATCH(_model) { .vendor  = X86_VENDOR_INTEL,     \
-                             .family  = 6,                     \
-                             .model = _model,                  \
-                           }
 /*
  * INVLPG may not properly flush Global entries
  * on these CPUs when PCIDs are enabled.
  */
 static const struct x86_cpu_id invlpg_miss_ids[] = {
-       INTEL_MATCH(INTEL_FAM6_ALDERLAKE   ),
-       INTEL_MATCH(INTEL_FAM6_ALDERLAKE_L ),
-       INTEL_MATCH(INTEL_FAM6_ALDERLAKE_N ),
-       INTEL_MATCH(INTEL_FAM6_RAPTORLAKE  ),
-       INTEL_MATCH(INTEL_FAM6_RAPTORLAKE_P),
-       INTEL_MATCH(INTEL_FAM6_RAPTORLAKE_S),
+       X86_MATCH_INTEL_FAM6_MODEL(ALDERLAKE,      0),
+       X86_MATCH_INTEL_FAM6_MODEL(ALDERLAKE_L,    0),
+       X86_MATCH_INTEL_FAM6_MODEL(ALDERLAKE_N,    0),
+       X86_MATCH_INTEL_FAM6_MODEL(RAPTORLAKE,     0),
+       X86_MATCH_INTEL_FAM6_MODEL(RAPTORLAKE_P,   0),
+       X86_MATCH_INTEL_FAM6_MODEL(RAPTORLAKE_S,   0),
        {}
 };