arm: avoid inline asm for dsb, isb, wfi and sev.

"dsb" must be written "dsb sy" on arm64. "dsb sy" is also valid (and
synonymous) on arm32 but we have a macro so lets use it.

Signed-off-by: Ian Campbell <ian.campbell@citrix.com>
Acked-by: Stefano Stabellini <stefano.stabellini@eu.citrix.com>
Acked-by: Tim Deegan <tim@xen.org>

diff --git a/xen/arch/arm/domain.c b/xen/arch/arm/domain.c
index 63a166de7a3fdf3198eb72808b6490f463e30c7f..2445b6a27601f9868e2e3000b29a2406494abab2 100644 (file)
--- a/xen/arch/arm/domain.c
+++ b/xen/arch/arm/domain.c
@@ -29,7 +29,10 @@ void idle_loop(void)
 
         local_irq_disable();
         if ( cpu_is_haltable(smp_processor_id()) )
-            asm volatile ("dsb; wfi");
+        {
+            dsb();
+            wfi();
+        }
         local_irq_enable();
 
         do_tasklet();

diff --git a/xen/arch/arm/smpboot.c b/xen/arch/arm/smpboot.c
index 893612333aaf633c08a6d9c0690df58fce6b96f6..d9b43a8a55d0d9f70010e3ead46f4bc83c1e487f 100644 (file)
--- a/xen/arch/arm/smpboot.c
+++ b/xen/arch/arm/smpboot.c
@@ -122,7 +122,8 @@ make_cpus_ready(unsigned int max_cpus, unsigned long boot_phys_offset)
         /* TODO: handle boards where CPUIDs are not contiguous */
         *gate = i;
         flush_xen_dcache(*gate);
-        asm volatile("isb; sev");
+        isb();
+        sev();
         /* And wait for it to respond */
         while ( ready_cpus < i )
             smp_rmb();
@@ -204,8 +205,8 @@ void stop_cpu(void)
     /* Make sure the write happens before we sleep forever */
     dsb();
     isb();
-    while ( 1 ) 
-        asm volatile("wfi");
+    while ( 1 )
+        wfi();
 }
 
 /* Bring up a remote CPU */
@@ -220,7 +221,8 @@ int __cpu_up(unsigned int cpu)
     /* we need to make sure that the change to smp_up_cpu is visible to
      * secondary cpus with D-cache off */
     flush_xen_dcache(smp_up_cpu);
-    asm volatile("isb; sev");
+    isb();
+    sev();
 
     while ( !cpu_online(cpu) )
     {