return 0;
}
+int vpci_msi_arch_update(struct vpci_msi *msi, const struct pci_dev *pdev)
+{
+ int rc;
+
+ ASSERT(msi->arch.pirq != INVALID_PIRQ);
+
+ pcidevs_lock();
+ rc = vpci_msi_update(pdev, msi->data, msi->address, msi->vectors,
+ msi->arch.pirq, msi->mask);
+ if ( rc )
+ {
+ spin_lock(&pdev->domain->event_lock);
+ unmap_domain_pirq(pdev->domain, msi->arch.pirq);
+ spin_unlock(&pdev->domain->event_lock);
+ pcidevs_unlock();
+ msi->arch.pirq = INVALID_PIRQ;
+ return rc;
+ }
+ pcidevs_unlock();
+
+ return 0;
+}
+
static int vpci_msi_enable(const struct pci_dev *pdev, uint32_t data,
uint64_t address, unsigned int nr,
paddr_t table_base, uint32_t mask)
if ( !msi->enabled )
return;
- vpci_msi_arch_disable(msi, pdev);
- if ( vpci_msi_arch_enable(msi, pdev, msi->vectors) )
+ if ( vpci_msi_arch_update(msi, pdev) )
msi->enabled = false;
}
const struct pci_dev *pdev,
unsigned int vectors);
void vpci_msi_arch_disable(struct vpci_msi *msi, const struct pci_dev *pdev);
+int __must_check vpci_msi_arch_update(struct vpci_msi *msi,
+ const struct pci_dev *pdev);
void vpci_msi_arch_init(struct vpci_msi *msi);
void vpci_msi_arch_print(const struct vpci_msi *msi);