PLE_Gap controls teh maximum allowable time between executions of
PAUSE in a busy loop. Essentially this controls the sensitivity of the
processor's busy-loop detection.
Changed the default PLE_Gap to 128 for
1. not using odd number like 41
2. getting a little bit more PLE vmexits to improve performance
Signed-off-by: Zhai Edwin <edwin.zhai@intel.com>
* Time is measured based on a counter that runs at the same rate as the TSC,
* refer SDM volume 3b section 21.6.13 & 22.1.3.
*/
-static unsigned int __read_mostly ple_gap = 41;
+static unsigned int __read_mostly ple_gap = 128;
integer_param("ple_gap", ple_gap);
static unsigned int __read_mostly ple_window = 4096;
integer_param("ple_window", ple_window);