replace dmb instruction with coprocessor barrier instruction.

diff --git a/debian/changelog b/debian/changelog
index b3a905e417e0ab4e75c4deb6d1a07b7436da5db6..31eda797a4361d1a694adf410674db39a09b1107 100644 (file)
--- a/debian/changelog
+++ b/debian/changelog
@@ -9,7 +9,10 @@ ghc (9.4.7-2+rpi1) trixie-staging; urgency=medium
   [changes brought forward from 9.0.2-4+rpi3 by Peter Michael Green <plugwash@raspbian.org> at Wed, 05 Oct 2022 13:33:13 +0000]
   * Add build conflicts on libnuma1
 
- -- Raspbian forward porter <root@raspbian.org>  Tue, 19 Dec 2023 10:20:21 +0000
+  [changes introduced in 9.4.7-2+rpi1 by Peter Michael Green]
+  * replace dmb instruction with coprocessor barrier instruction.
+
+ -- Peter Michael Green <plugwash@raspbian.org>  Fri, 22 Dec 2023 05:25:33 +0000
 
 ghc (9.4.7-2) unstable; urgency=medium
 

diff --git a/rts/include/stg/SMP.h b/rts/include/stg/SMP.h
index 41cfc2c416ec02f8acb4f8d5250257f24a51a6e6..76ed1805019c0e9ad081d505f6e03f78503e8624 100644 (file)
--- a/rts/include/stg/SMP.h
+++ b/rts/include/stg/SMP.h
@@ -409,7 +409,7 @@ write_barrier(void) {
 #elif defined(s390x_HOST_ARCH)
     __asm__ __volatile__ ("" : : : "memory");
 #elif defined(arm_HOST_ARCH) || defined(aarch64_HOST_ARCH)
-    __asm__ __volatile__ ("dmb  st" : : : "memory");
+    __asm__ __volatile__ ("mcr p15, #0, r0, c7, c10, #5" : : : "memory");
 #elif defined(riscv64_HOST_ARCH)
     __asm__ __volatile__ ("fence w,w" : : : "memory");
 #else
@@ -431,7 +431,7 @@ store_load_barrier(void) {
 #elif defined(s390x_HOST_ARCH)
     __asm__ __volatile__ ("bcr 14,0" : : : "memory");
 #elif defined(arm_HOST_ARCH)
-    __asm__ __volatile__ ("dmb" : : : "memory");
+    __asm__ __volatile__ ("mcr p15, #0, r0, c7, c10, #5" : : : "memory");
 #elif defined(aarch64_HOST_ARCH)
     __asm__ __volatile__ ("dmb sy" : : : "memory");
 #elif defined(riscv64_HOST_ARCH)
@@ -455,7 +455,7 @@ load_load_barrier(void) {
 #elif defined(s390x_HOST_ARCH)
     __asm__ __volatile__ ("" : : : "memory");
 #elif defined(arm_HOST_ARCH)
-    __asm__ __volatile__ ("dmb" : : : "memory");
+    __asm__ __volatile__ ("mcr p15, #0, r0, c7, c10, #5" : : : "memory");
 #elif defined(aarch64_HOST_ARCH)
     __asm__ __volatile__ ("dmb ld" : : : "memory");
 #elif defined(riscv64_HOST_ARCH)