arm: use gprintk as appropriate

gdprintk is now only included with debug=y builds. Therefore:
 - switch some uses to gprintk
 - remove some now redundant #ifndef NDEBUG surrounding existing
   gdprintk uses.

Signed-off-by: Ian Campbell <ian.campbell@citrix.com>
Reviewed-by: Julien Grall <julien.grall@linaro.org>

diff --git a/xen/arch/arm/decode.c b/xen/arch/arm/decode.c
index 9d237f8c91025ef3b98e36b77a266fb2148f5eed..c6f49a5139c196f945be2c1111233ae25ba6fc34 100644 (file)
--- a/xen/arch/arm/decode.c
+++ b/xen/arch/arm/decode.c
@@ -78,7 +78,7 @@ static int decode_thumb2(register_t pc, struct hsr_dabt *dabt, uint16_t hw1)
     return 0;
 
 bad_thumb2:
-    gdprintk(XENLOG_ERR, "unhandled THUMB2 instruction 0x%x%x\n", hw1, hw2);
+    gprintk(XENLOG_ERR, "unhandled THUMB2 instruction 0x%x%x\n", hw1, hw2);
 
     return 1;
 }
@@ -145,7 +145,7 @@ static int decode_thumb(register_t pc, struct hsr_dabt *dabt)
     return 0;
 
 bad_thumb:
-    gdprintk(XENLOG_ERR, "unhandled THUMB instruction 0x%x\n", instr);
+    gprintk(XENLOG_ERR, "unhandled THUMB instruction 0x%x\n", instr);
     return 1;
 }
 
@@ -155,7 +155,7 @@ int decode_instruction(const struct cpu_user_regs *regs, struct hsr_dabt *dabt)
         return decode_thumb(regs->pc, dabt);
 
     /* TODO: Handle ARM instruction */
-    gdprintk(XENLOG_ERR, "unhandled ARM instruction\n");
+    gprintk(XENLOG_ERR, "unhandled ARM instruction\n");
 
     return 1;
 }

diff --git a/xen/arch/arm/traps.c b/xen/arch/arm/traps.c
index ad046e87c2072797466c7cbb0ab99d4e9923b9a1..0ea0062f1c69a9c169cafc0ffe4d7558b7952b9c 100644 (file)
--- a/xen/arch/arm/traps.c
+++ b/xen/arch/arm/traps.c
@@ -1644,14 +1644,12 @@ static void do_cp15_32(struct cpu_user_regs *regs,
         break;
 
     default:
-#ifndef NDEBUG
         gdprintk(XENLOG_ERR,
                  "%s p15, %d, r%d, cr%d, cr%d, %d @ 0x%"PRIregister"\n",
                  cp32.read ? "mrc" : "mcr",
                  cp32.op1, cp32.reg, cp32.crn, cp32.crm, cp32.op2, regs->pc);
         gdprintk(XENLOG_ERR, "unhandled 32-bit CP15 access %#x\n",
                  hsr.bits & HSR_CP32_REGS_MASK);
-#endif
         inject_undef_exception(regs, hsr.len);
         return;
     }
@@ -1679,7 +1677,6 @@ static void do_cp15_64(struct cpu_user_regs *regs,
         break;
     default:
         {
-#ifndef NDEBUG
             struct hsr_cp64 cp64 = hsr.cp64;
 
             gdprintk(XENLOG_ERR,
@@ -1688,7 +1685,6 @@ static void do_cp15_64(struct cpu_user_regs *regs,
                      cp64.op1, cp64.reg1, cp64.reg2, cp64.crm, regs->pc);
             gdprintk(XENLOG_ERR, "unhandled 64-bit CP15 access %#x\n",
                      hsr.bits & HSR_CP64_REGS_MASK);
-#endif
             inject_undef_exception(regs, hsr.len);
             return;
         }
@@ -1750,14 +1746,12 @@ static void do_cp14_32(struct cpu_user_regs *regs, union hsr hsr)
 
     default:
 bad_cp:
-#ifndef NDEBUG
         gdprintk(XENLOG_ERR,
                  "%s p14, %d, r%d, cr%d, cr%d, %d @ 0x%"PRIregister"\n",
                   cp32.read ? "mrc" : "mcr",
                   cp32.op1, cp32.reg, cp32.crn, cp32.crm, cp32.op2, regs->pc);
         gdprintk(XENLOG_ERR, "unhandled 32-bit cp14 access %#x\n",
                  hsr.bits & HSR_CP32_REGS_MASK);
-#endif
         inject_undef_exception(regs, hsr.len);
         return;
     }
@@ -1767,9 +1761,7 @@ bad_cp:
 
 static void do_cp14_dbg(struct cpu_user_regs *regs, union hsr hsr)
 {
-#ifndef NDEBUG
     struct hsr_cp64 cp64 = hsr.cp64;
-#endif
 
     if ( !check_conditional_instr(regs, hsr) )
     {
@@ -1777,22 +1769,19 @@ static void do_cp14_dbg(struct cpu_user_regs *regs, union hsr hsr)
         return;
     }
 
-#ifndef NDEBUG
     gdprintk(XENLOG_ERR,
              "%s p14, %d, r%d, r%d, cr%d @ 0x%"PRIregister"\n",
              cp64.read ? "mrrc" : "mcrr",
              cp64.op1, cp64.reg1, cp64.reg2, cp64.crm, regs->pc);
     gdprintk(XENLOG_ERR, "unhandled 64-bit CP14 access %#x\n",
              hsr.bits & HSR_CP64_REGS_MASK);
-#endif
+
     inject_undef_exception(regs, hsr.len);
 }
 
 static void do_cp(struct cpu_user_regs *regs, union hsr hsr)
 {
-#ifndef NDEBUG
     struct hsr_cp cp = hsr.cp;
-#endif
 
     if ( !check_conditional_instr(regs, hsr) )
     {
@@ -1800,10 +1789,8 @@ static void do_cp(struct cpu_user_regs *regs, union hsr hsr)
         return;
     }
 
-#ifndef NDEBUG
     ASSERT(!cp.tas); /* We don't trap SIMD instruction */
     gdprintk(XENLOG_ERR, "unhandled CP%d access\n", cp.coproc);
-#endif
     inject_undef_exception(regs, hsr.len);
 }
 
@@ -1880,7 +1867,6 @@ static void do_sysreg(struct cpu_user_regs *regs,
  bad_sysreg:
         {
             struct hsr_sysreg sysreg = hsr.sysreg;
-#ifndef NDEBUG
 
             gdprintk(XENLOG_ERR,
                      "%s %d, %d, c%d, c%d, %d %s x%d @ 0x%"PRIregister"\n",
@@ -1892,7 +1878,7 @@ static void do_sysreg(struct cpu_user_regs *regs,
                      sysreg.reg, regs->pc);
             gdprintk(XENLOG_ERR, "unhandled 64-bit sysreg access %#x\n",
                      hsr.bits & HSR_SYSREG_REGS_MASK);
-#endif
+
             inject_undef_exception(regs, sysreg.len);
             return;
         }
@@ -2005,7 +1991,7 @@ static void do_trap_data_abort_guest(struct cpu_user_regs *regs,
         rc = decode_instruction(regs, &info.dabt);
         if ( rc )
         {
-            gdprintk(XENLOG_DEBUG, "Unable to decode instruction\n");
+            gprintk(XENLOG_DEBUG, "Unable to decode instruction\n");
             goto bad_data_abort;
         }
     }

diff --git a/xen/arch/arm/vgic-v3.c b/xen/arch/arm/vgic-v3.c
index ec79c2afab21d038524a6c2dd9be004fa8bbf64f..81fbb26adb3ca453ad5a5096aa9bbad8f604e8a2 100644 (file)
--- a/xen/arch/arm/vgic-v3.c
+++ b/xen/arch/arm/vgic-v3.c
@@ -1022,7 +1022,7 @@ static int vgic_v3_to_sgi(struct vcpu *v, register_t sgir)
         sgi_mode = SGI_TARGET_OTHERS;
         break;
     default:
-        gdprintk(XENLOG_WARNING, "Wrong irq mode in SGI1R_EL1 register\n");
+        gprintk(XENLOG_WARNING, "Wrong irq mode in SGI1R_EL1 register\n");
         return 0;
     }
 
@@ -1050,7 +1050,7 @@ static int vgic_v3_emulate_sysreg(struct cpu_user_regs *regs, union hsr hsr)
             return vgic_v3_to_sgi(v, *r);
         else
         {
-            gdprintk(XENLOG_WARNING, "Reading SGI1R_EL1 - WO register\n");
+            gprintk(XENLOG_WARNING, "Reading SGI1R_EL1 - WO register\n");
             return 0;
         }
     default:

diff --git a/xen/arch/arm/vgic.c b/xen/arch/arm/vgic.c
index c14d79dfa13dd3c0cb3b1e1bdf533eb87d38bd73..7b2790015ac5bb43ae7b682d4665f866fb096400 100644 (file)
--- a/xen/arch/arm/vgic.c
+++ b/xen/arch/arm/vgic.c
@@ -337,9 +337,9 @@ int vgic_to_sgi(struct vcpu *v, register_t sgir, enum gic_sgi_mode irqmode, int
         set_bit(current->vcpu_id, &vcpu_mask);
         break;
     default:
-        gdprintk(XENLOG_WARNING,
-                 "vGICD:unhandled GICD_SGIR write %"PRIregister" \
-                  with wrong mode\n", sgir);
+        gprintk(XENLOG_WARNING,
+                "vGICD:unhandled GICD_SGIR write %"PRIregister" \
+                 with wrong mode\n", sgir);
         return 0;
     }
 
@@ -347,8 +347,8 @@ int vgic_to_sgi(struct vcpu *v, register_t sgir, enum gic_sgi_mode irqmode, int
     {
         if ( d->vcpu[vcpuid] != NULL && !is_vcpu_online(d->vcpu[vcpuid]) )
         {
-            gdprintk(XENLOG_WARNING, "VGIC: write r=%"PRIregister" \
-                     vcpu_mask=%lx, wrong CPUTargetList\n", sgir, vcpu_mask);
+            gprintk(XENLOG_WARNING, "VGIC: write r=%"PRIregister" \
+                    vcpu_mask=%lx, wrong CPUTargetList\n", sgir, vcpu_mask);
             continue;
         }
         vgic_vcpu_inject_irq(d->vcpu[vcpuid], virq);

diff --git a/xen/arch/arm/vtimer.c b/xen/arch/arm/vtimer.c
index 4427ae5690d984e983d292f19460bc8c3579c935..287bb93a8ba262b89b52afd8d60a8c8326e4bbf9 100644 (file)
--- a/xen/arch/arm/vtimer.c
+++ b/xen/arch/arm/vtimer.c
@@ -217,7 +217,7 @@ static int vtimer_cntpct(struct cpu_user_regs *regs, uint64_t *r, int read)
     }
     else
     {
-        gdprintk(XENLOG_DEBUG, "WRITE to R/O CNTPCT\n");
+        gprintk(XENLOG_DEBUG, "WRITE to R/O CNTPCT\n");
         return 0;
     }
 }