ARM: dts: sunxi: Restore EMAC changes (boards)
authorCorentin Labbe <clabbe.montjoie@gmail.com>
Tue, 31 Oct 2017 08:19:12 +0000 (09:19 +0100)
committerBen Hutchings <ben@decadent.org.uk>
Sun, 14 Jan 2018 19:45:05 +0000 (19:45 +0000)
The original dwmac-sun8i DT bindings have some issue on how to handle
integrated PHY and was reverted in last RC of 4.13.
But now we have a solution so we need to get back that was reverted.

This patch restore all boards DT about dwmac-sun8i
This reverts partially commit fe45174b72ae ("arm: dts: sunxi: Revert EMAC changes")

Signed-off-by: Corentin Labbe <clabbe.montjoie@gmail.com>
Acked-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Gbp-Pq: Topic features/arm/dwmac-sun8i
Gbp-Pq: Name 0006-ARM-dts-sunxi-Restore-EMAC-changes-boards.patch

arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts
arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts
arch/arm/boot/dts/sun8i-h3-nanopi-neo.dts
arch/arm/boot/dts/sun8i-h3-orangepi-2.dts
arch/arm/boot/dts/sun8i-h3-orangepi-one.dts
arch/arm/boot/dts/sun8i-h3-orangepi-pc-plus.dts
arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts
arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts
arch/arm/boot/dts/sun8i-h3-orangepi-plus2e.dts

index b1502df7b50923a70d996847d1cd258d92cda73c..6713d0f2b3f4d3f3f62231bf6a74bf35828ce8b0 100644 (file)
@@ -56,6 +56,8 @@
 
        aliases {
                serial0 = &uart0;
+               /* ethernet0 is the H3 emac, defined in sun8i-h3.dtsi */
+               ethernet0 = &emac;
                ethernet1 = &xr819;
        };
 
        status = "okay";
 };
 
+&emac {
+       phy-handle = <&int_mii_phy>;
+       phy-mode = "mii";
+       allwinner,leds-active-low;
+       status = "okay";
+};
+
 &mmc0 {
        pinctrl-names = "default";
        pinctrl-0 = <&mmc0_pins_a>;
index a337af1de32246b69807f4ee3b65e04e63231967..3f95d806355baf169e6e2cc1cbd41fd55408918f 100644 (file)
@@ -52,6 +52,7 @@
        compatible = "sinovoip,bpi-m2-plus", "allwinner,sun8i-h3";
 
        aliases {
+               ethernet0 = &emac;
                serial0 = &uart0;
                serial1 = &uart1;
        };
        status = "okay";
 };
 
+&emac {
+       pinctrl-names = "default";
+       pinctrl-0 = <&emac_rgmii_pins>;
+       phy-supply = <&reg_gmac_3v3>;
+       phy-handle = <&ext_rgmii_phy>;
+       phy-mode = "rgmii";
+
+       allwinner,leds-active-low;
+       status = "okay";
+};
+
+&external_mdio {
+       ext_rgmii_phy: ethernet-phy@1 {
+               compatible = "ethernet-phy-ieee802.3-c22";
+               reg = <0>;
+       };
+};
+
 &ir {
        pinctrl-names = "default";
        pinctrl-0 = <&ir_pins_a>;
index 8d2cc6e9a03faff3cc71965493e5c54c1359e9f3..78f6c24952dd128249fd3010d212222832bb060a 100644 (file)
        model = "FriendlyARM NanoPi NEO";
        compatible = "friendlyarm,nanopi-neo", "allwinner,sun8i-h3";
 };
+
+&emac {
+       phy-handle = <&int_mii_phy>;
+       phy-mode = "mii";
+       allwinner,leds-active-low;
+       status = "okay";
+};
index 8ff71b1bb45b1c918d71e686ef4da4de7250306a..17cdeae19c6f0f297d680c5c4f1c09e36071cfda 100644 (file)
@@ -54,6 +54,7 @@
        aliases {
                serial0 = &uart0;
                /* ethernet0 is the H3 emac, defined in sun8i-h3.dtsi */
+               ethernet0 = &emac;
                ethernet1 = &rtl8189;
        };
 
        status = "okay";
 };
 
+&emac {
+       phy-handle = <&int_mii_phy>;
+       phy-mode = "mii";
+       allwinner,leds-active-low;
+       status = "okay";
+};
+
 &ir {
        pinctrl-names = "default";
        pinctrl-0 = <&ir_pins_a>;
index 5fea430e0eb1006120dd9b98dd904cdd7af14b67..6880268e8b87b0d7385e73dc95c23aaa8f25bd9a 100644 (file)
@@ -52,6 +52,7 @@
        compatible = "xunlong,orangepi-one", "allwinner,sun8i-h3";
 
        aliases {
+               ethernet0 = &emac;
                serial0 = &uart0;
        };
 
        status = "okay";
 };
 
+&emac {
+       phy-handle = <&int_mii_phy>;
+       phy-mode = "mii";
+       allwinner,leds-active-low;
+       status = "okay";
+};
+
 &mmc0 {
        pinctrl-names = "default";
        pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin>;
index 8b93f5c781a70b565ed0012d2c29b35f04987dcd..a10281b455f50ccad1f26087ae14884600c19c90 100644 (file)
        };
 };
 
+&emac {
+       /* LEDs changed to active high on the plus */
+       /delete-property/ allwinner,leds-active-low;
+};
+
 &mmc1 {
        pinctrl-names = "default";
        pinctrl-0 = <&mmc1_pins_a>;
index 1a044b17d6c61e5cc391782c5e06aa3df7322548..998b60f8d295e85fe09e184943ffafd45eb1da33 100644 (file)
@@ -52,6 +52,7 @@
        compatible = "xunlong,orangepi-pc", "allwinner,sun8i-h3";
 
        aliases {
+               ethernet0 = &emac;
                serial0 = &uart0;
        };
 
        status = "okay";
 };
 
+&emac {
+       phy-handle = <&int_mii_phy>;
+       phy-mode = "mii";
+       allwinner,leds-active-low;
+       status = "okay";
+};
+
 &ir {
        pinctrl-names = "default";
        pinctrl-0 = <&ir_pins_a>;
index 828ae7a526d924955e666a4ad110f565aa931bf5..3002c025e1873a4a0876128b1a4bb6a030b87993 100644 (file)
        model = "Xunlong Orange Pi Plus / Plus 2";
        compatible = "xunlong,orangepi-plus", "allwinner,sun8i-h3";
 
+       aliases {
+               ethernet0 = &emac;
+       };
+
        reg_gmac_3v3: gmac-3v3 {
                compatible = "regulator-fixed";
                regulator-name = "gmac-3v3";
        status = "okay";
 };
 
+&emac {
+       pinctrl-names = "default";
+       pinctrl-0 = <&emac_rgmii_pins>;
+       phy-supply = <&reg_gmac_3v3>;
+       phy-handle = <&ext_rgmii_phy>;
+       phy-mode = "rgmii";
+
+       allwinner,leds-active-low;
+       status = "okay";
+};
+
+&external_mdio {
+       ext_rgmii_phy: ethernet-phy@1 {
+               compatible = "ethernet-phy-ieee802.3-c22";
+               reg = <0>;
+       };
+};
+
 &mmc2 {
        pinctrl-names = "default";
        pinctrl-0 = <&mmc2_8bit_pins>;
index 97920b12a944526f3c5dd15de7435f5e30195a3c..6dbf7b2e0c13c44f06e7970c006f3357f0d0493e 100644 (file)
                gpio = <&pio 3 6 GPIO_ACTIVE_HIGH>; /* PD6 */
        };
 };
+
+&emac {
+       pinctrl-names = "default";
+       pinctrl-0 = <&emac_rgmii_pins>;
+       phy-supply = <&reg_gmac_3v3>;
+       phy-handle = <&ext_rgmii_phy>;
+       phy-mode = "rgmii";
+       status = "okay";
+};
+
+&external_mdio {
+       ext_rgmii_phy: ethernet-phy@1 {
+               compatible = "ethernet-phy-ieee802.3-c22";
+               reg = <1>;
+       };
+};