xen/arm: gic-v3: Make sure read from ICC_IAR1_EL1 is visible on the redistributor

"The effects of reading ICC_IAR0_EL1 and ICC_IAR1_EL1 on the state of a
returned INTID are not guaranteed to be visible until after the execution
of a DSB".

Because of the GIC is an external component, a dsb sy is required.
Without it the sysreg read may not have been made visible on the
redistributor.

Signed-off-by: Julien Grall <julien.grall@arm.com>
Reviewed-by: Stefano Stabellini <sstabellini@kernel.org>

diff --git a/xen/arch/arm/gic-v3.c b/xen/arch/arm/gic-v3.c
index 57ed9d9e78140f635a0aeedfc890cadd2a451db5..955591b74443ecfdfa18c9d09524b219d4278668 100644 (file)
--- a/xen/arch/arm/gic-v3.c
+++ b/xen/arch/arm/gic-v3.c
@@ -459,7 +459,11 @@ static void gicv3_dir_irq(struct irq_desc *irqd)
 
 static unsigned int gicv3_read_irq(void)
 {
-    return READ_SYSREG32(ICC_IAR1_EL1);
+    unsigned int irq = READ_SYSREG32(ICC_IAR1_EL1);
+
+    dsb(sy);
+
+    return irq;
 }
 
 static inline uint64_t gicv3_mpidr_to_affinity(int cpu)