There is no need for the volatile cast in the timer interrupt; the compiler
may not elide the update. This reduces the generated assembly from a read,
local modify, write to a single add instruction.
Drop the memory barriers from timer_irq_works(), as they are not needed.
pit0_ticks is only modified by timer_interrupt() running on the same CPU, so
all that is required is a volatile reference to prevent the compiler from
eliding the second read.
Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Reviewed-by: Jan Beulich <jbeulich@suse.com>
{
unsigned long t1, flags;
- t1 = pit0_ticks;
- mb();
+ t1 = ACCESS_ONCE(pit0_ticks);
local_save_flags(flags);
local_irq_enable();
* might have cached one ExtINT interrupt. Finally, at
* least one tick may be lost due to delays.
*/
- mb();
- if (pit0_ticks - t1 > 4)
+ if ( (ACCESS_ONCE(pit0_ticks) - t1) > 4 )
return 1;
return 0;
return;
/* Only for start-of-day interruopt tests in io_apic.c. */
- (*(volatile unsigned long *)&pit0_ticks)++;
+ pit0_ticks++;
/* Rough hack to allow accurate timers to sort-of-work with no APIC. */
if ( !cpu_has_apic )
#define ARRAY_SIZE(x) (sizeof(x) / sizeof((x)[0]) + __must_be_array(x))
+#define ACCESS_ONCE(x) (*(volatile typeof(x) *)&(x))
+
#define MASK_EXTR(v, m) (((v) & (m)) / ((m) & -(m)))
#define MASK_INSR(v, m) (((v) * ((m) & -(m))) & (m))