#define MSR_K7_FID_VID_CTL 0xc0010041
#define MSR_K7_FID_VID_STATUS 0xc0010042
#define MSR_K8_ENABLE_C1E 0xc0010055
-#define MSR_K8_VM_CR 0xC0010114
-#define MSR_K8_VM_HSAVE_PA 0xC0010117
+#define MSR_K8_VM_CR 0xc0010114
+#define MSR_K8_VM_HSAVE_PA 0xc0010117
/* MSR_K8_VM_CR bits: */
#define _K8_VMCR_SVME_DISABLE 4
#define K8_VMCR_SVME_DISABLE (1 << _K8_VMCR_SVME_DISABLE)
+/* AMD Family10h machine check MSRs */
+#define MSR_F10_MC4_MISC1 0xc0000408
+#define MSR_F10_MC4_MISC2 0xc0000409
+#define MSR_F10_MC4_MISC3 0xc000040A
+
/* K6 MSRs */
#define MSR_K6_EFER 0xc0000080
#define MSR_K6_STAR 0xc0000081