Add definitions for machine check MSRs introduced in AMD Family 0x10 (Barcelona).
authorKeir Fraser <keir@xensource.com>
Tue, 23 Oct 2007 15:12:14 +0000 (16:12 +0100)
committerKeir Fraser <keir@xensource.com>
Tue, 23 Oct 2007 15:12:14 +0000 (16:12 +0100)
Signed-off-by: Christoph Egger <Christoph.Egger@amd.com>
xen/include/asm-x86/msr-index.h

index aafc2907c5ec133e99f43cfa1e2d0a885a7935c5..e6cfa18928c90db3dbe1d38d8d4fc162a4b61744 100644 (file)
 #define MSR_K7_FID_VID_CTL             0xc0010041
 #define MSR_K7_FID_VID_STATUS          0xc0010042
 #define MSR_K8_ENABLE_C1E              0xc0010055
-#define MSR_K8_VM_CR                   0xC0010114
-#define MSR_K8_VM_HSAVE_PA             0xC0010117
+#define MSR_K8_VM_CR                   0xc0010114
+#define MSR_K8_VM_HSAVE_PA             0xc0010117
 
 /* MSR_K8_VM_CR bits: */
 #define _K8_VMCR_SVME_DISABLE          4
 #define K8_VMCR_SVME_DISABLE           (1 << _K8_VMCR_SVME_DISABLE)
 
+/* AMD Family10h machine check MSRs */
+#define MSR_F10_MC4_MISC1              0xc0000408
+#define MSR_F10_MC4_MISC2              0xc0000409
+#define MSR_F10_MC4_MISC3              0xc000040A
+
 /* K6 MSRs */
 #define MSR_K6_EFER                    0xc0000080
 #define MSR_K6_STAR                    0xc0000081