The two central functions to synchronise our emulated VGIC state with
the GIC hardware (the LRs, really), are named somewhat confusingly.
Rename them from gic_inject() to vgic_sync_to_lrs() and from
gic_clear_lrs() to vgic_sync_from_lrs(), to make the code more readable.
Signed-off-by: Andre Przywara <andre.przywara@linaro.org>
Acked-by: Julien Grall <julien.grall@arm.com>
}
}
-void gic_clear_lrs(struct vcpu *v)
+void vgic_sync_from_lrs(struct vcpu *v)
{
int i = 0;
unsigned long flags;
return rc;
}
-void gic_inject(void)
+void vgic_sync_to_lrs(void)
{
ASSERT(!local_irq_is_enabled());
if ( current->arch.hcr_el2 & HCR_VA )
current->arch.hcr_el2 = READ_SYSREG(HCR_EL2);
- gic_clear_lrs(current);
+ vgic_sync_from_lrs(current);
}
}
{
local_irq_disable();
if (!softirq_pending(smp_processor_id())) {
- gic_inject();
+ vgic_sync_to_lrs();
/*
* If the SErrors handle option is "DIVERSE", we have to prevent
int gic_remove_irq_from_guest(struct domain *d, unsigned int virq,
struct irq_desc *desc);
-extern void gic_inject(void);
+extern void vgic_sync_to_lrs(void);
extern void gic_clear_pending_irqs(struct vcpu *v);
extern int gic_events_need_delivery(void);
/* IRQ translation function for the device tree */
int gic_irq_xlate(const u32 *intspec, unsigned int intsize,
unsigned int *out_hwirq, unsigned int *out_type);
-void gic_clear_lrs(struct vcpu *v);
+void vgic_sync_from_lrs(struct vcpu *v);
struct gic_info {
/* GIC version */