static int tpm_driver_to_use = TPM_INVALID_DRIVER;
static
-uint32_t MA_IsTPMPresent()
+uint32_t MA_IsTPMPresent(void)
{
uint32_t rc = 0;
unsigned int i;
{
struct acpi_20_rsdt *rsdt;
uint32_t length;
- struct acpi_20_tcpa *tcpa;
+ struct acpi_20_tcpa *tcpa = (void *)0;
uint16_t found = 0;
uint16_t rsdp_off;
uint16_t off;
- struct acpi_20_rsdp *rsdp;
+ struct acpi_20_rsdp *rsdp = (void *)0;
if (MA_IsTPMPresent() == 0) {
return;
void tcpa_measure_post(Bit32u from, Bit32u to)
{
struct pcpes pcpes; /* PCClientPCREventStruc */
- memset(&pcpes, 0x0, sizeof(pcpes));
int len = to - from;
+ memset(&pcpes, 0x0, sizeof(pcpes));
if (len > 0) {
sha1((unsigned char *)from,
{
uint32_t rc = 0;
uint8_t *cmd32;
- uint32_t resbuflen;
+ uint32_t resbuflen = 0;
if (TCG_IsShutdownPreBootInterface() != 0) {
rc = (TCG_PC_TPMERROR |
} sha1_ctx;
-static inline uint32_t rol(val, rol)
- uint32_t val;
- uint16_t rol;
+static inline uint32_t rol(uint32_t val, uint16_t rol)
{
return (val << rol) | (val >> (32 - rol));
}
#include "tpm_drivers.h"
#include "tcgbios.h"
+#define STS_VALID (1 << 7) /* 0x80 */
+#define STS_COMMAND_READY (1 << 6) /* 0x40 */
+#define STS_TPM_GO (1 << 5) /* 0x20 */
+#define STS_DATA_AVAILABLE (1 << 4) /* 0x10 */
+#define STS_EXPECT (1 << 3) /* 0x08 */
+#define STS_RESPONSE_RETRY (1 << 1) /* 0x02 */
+
+#define ACCESS_TPM_REG_VALID_STS (1 << 7) /* 0x80 */
+#define ACCESS_ACTIVE_LOCALITY (1 << 5) /* 0x20 */
+#define ACCESS_BEEN_SEIZED (1 << 4) /* 0x10 */
+#define ACCESS_SEIZE (1 << 3) /* 0x08 */
+#define ACCESS_PENDING_REQUEST (1 << 2) /* 0x04 */
+#define ACCESS_REQUEST_USE (1 << 1) /* 0x02 */
+#define ACCESS_TPM_ESTABLISHMENT (1 << 0) /* 0x01 */
+
static uint32_t tis_wait_sts(uint8_t *addr, uint32_t time,
uint8_t mask, uint8_t expect)
{
uint32_t rc = 0;
while (time > 0) {
- uint8_t sts = addr[TPM_STS];
+ uint8_t sts = mmio_readb(&addr[TPM_STS]);
if ((sts & mask) == expect) {
rc = 1;
break;
static uint32_t tis_activate(uint32_t baseaddr)
{
- uint32_t rc = 0;
+ uint32_t rc = 1;
uint8_t *tis_addr = (uint8_t*)baseaddr;
uint8_t acc;
/* request access to locality */
- tis_addr[TPM_ACCESS] = 0x2;
+ tis_addr[TPM_ACCESS] = ACCESS_REQUEST_USE;
- acc = tis_addr[TPM_ACCESS];
- if ((acc & 0x20) != 0) {
- tis_addr[TPM_STS] = 0x40;
- rc = tis_wait_sts(tis_addr, 100, 0x40, 0x40);
+ acc = mmio_readb(&tis_addr[TPM_ACCESS]);
+ if ((acc & ACCESS_ACTIVE_LOCALITY) != 0) {
+ tis_addr[TPM_STS] = STS_COMMAND_READY;
+ rc = tis_wait_sts(tis_addr, 100,
+ STS_COMMAND_READY, STS_COMMAND_READY);
}
return rc;
}
uint32_t rc = 0;
uint8_t *tis_addr = (uint8_t*)baseaddr;
- tis_addr[TPM_STS] = 0x40;
- rc = tis_wait_sts(tis_addr, 100, 0x40, 0x40);
+ tis_addr[TPM_STS] = STS_COMMAND_READY;
+ rc = tis_wait_sts(tis_addr, 100, STS_COMMAND_READY, STS_COMMAND_READY);
return rc;
}
uint16_t burst = 0;
uint32_t ctr = 0;
while (burst == 0 && ctr < 2000) {
- burst = (((uint16_t)tis_addr[TPM_STS+1]) ) +
- (((uint16_t)tis_addr[TPM_STS+2]) << 8);
+ burst = mmio_readw((uint16_t *)&tis_addr[TPM_STS+1]);
if (burst == 0) {
mssleep(1);
ctr++;
uint32_t sts;
while (offset < len) {
- buffer[offset] = tis_addr[TPM_DATA_FIFO];
+ buffer[offset] = mmio_readb(&tis_addr[TPM_DATA_FIFO]);
offset++;
- sts = tis_addr[TPM_STS];
+ sts = mmio_readb(&tis_addr[TPM_STS]);
/* data left ? */
- if ((sts & 0x10) == 0) {
+ if ((sts & STS_DATA_AVAILABLE) == 0) {
break;
}
}
{
uint8_t *tis_addr = (uint8_t*)baseaddr;
uint32_t rc = 0;
- if (tis_wait_sts(tis_addr, 1000, 0x80, 0x80) == 0) {
+ if (tis_wait_sts(tis_addr, 1000, STS_VALID, STS_VALID) == 0) {
rc = TCG_NO_RESPONSE;
}
return rc;
{
uint32_t rc = 0;
uint8_t *tis_addr = (uint8_t*)baseaddr;
- tis_addr[TPM_STS] = 0x20;
- if (tis_wait_sts(tis_addr, timeout, 0x10, 0x10) == 0) {
+ tis_addr[TPM_STS] = STS_TPM_GO;
+ if (tis_wait_sts(tis_addr, timeout,
+ STS_DATA_AVAILABLE, STS_DATA_AVAILABLE) == 0) {
rc = TCG_NO_RESPONSE;
}
return rc;
{
uint32_t rc = 0;
uint8_t *tis_addr = (uint8_t*)baseaddr;
- uint32_t didvid = *(uint32_t*)&tis_addr[TPM_DID_VID];
+ uint32_t didvid = mmio_readl((uint32_t *)&tis_addr[TPM_DID_VID]);
if ((didvid != 0) && (didvid != 0xffffffff)) {
rc = 1;
}