/******************************************************************************
* arch/x86/hpet.c
- *
+ *
* HPET management.
*/
DEFINE_PER_CPU(struct hpet_event_channel *, cpu_bc_channel);
-unsigned long __read_mostly hpet_address;
+unsigned long __initdata hpet_address;
u8 __initdata hpet_blockid;
/*
{
if ( index != RTC_REG_B )
return;
-
+
/* RTC Reg B, contain PIE/AIE/UIE */
if ( value & (RTC_PIE | RTC_AIE | RTC_UIE ) )
{
/* can be routed to IOAPIC.redirect_table[23..20] */
#define HPET_TN_INT_ROUTE_CAP (0x00f00000ULL \
- << HPET_TN_INT_ROUTE_CAP_SHIFT)
+ << HPET_TN_INT_ROUTE_CAP_SHIFT)
#define HPET_TN_INT_ROUTE_CAP_MASK (0xffffffffULL \
<< HPET_TN_INT_ROUTE_CAP_SHIFT)
if ( hpet_enabled(h) )
return guest_time_hpet(h) + h->mc_offset;
- else
+ else
return h->hpet.mc64;
}
h->hpet.comparator64[tn] = comparator;
}
}
-
+
/* truncate if timer is in 32 bit mode */
if ( timer_is_32bit(h, tn) )
comparator = (uint32_t)comparator;
irq = timer_int_route(h, tn);
/*
- * diff is the time from now when the timer should fire, for a periodic
+ * diff is the time from now when the timer should fire, for a periodic
* timer we also need the period which may be different because time may
* have elapsed between the time the comparator was written and the timer
* being enabled (now).
h->hpet.mc64 = new_val;
if ( hpet_enabled(h) )
{
- gdprintk(XENLOG_WARNING,
+ gdprintk(XENLOG_WARNING,
"HPET: writing main counter but it's not halted!\n");
for ( i = 0; i < HPET_TIMER_NUM; i++ )
if ( timer_enabled(h, i) )
* timer's accumulator." That is, set the comparator without
* adjusting the period. Much the same as just setting the
* comparator on an enabled one-shot timer.
- *
+ *
* This configuration bit clears when the comparator is written.
*/
h->hpet.timers[tn].config &= ~HPET_TN_SETVAL;
hp->hpet.timers[i].cmp = cmp;
}
#undef C
-
+
/* Recalculate the offset between the main counter and guest time */
hp->mc_offset = hp->hpet.mc64 - guest_time_hpet(hp);
for ( i = 0; i < HPET_TIMER_NUM; i++ )
if ( timer_enabled(hp, i) )
hpet_set_timer(hp, i);
-
+
spin_unlock(&hp->lock);
return 0;
for ( i = 0; i < HPET_TIMER_NUM; i++ )
{
- h->hpet.timers[i].config =
+ h->hpet.timers[i].config =
HPET_TN_INT_ROUTE_CAP | HPET_TN_64BIT_CAP | HPET_TN_PERIODIC_CAP;
h->hpet.timers[i].cmp = ~0ULL;
h->pt[i].source = PTSRC_isa;
/*
* Documentation on HPET can be found at:
- * http://www.intel.com/ial/home/sp/pcmmspec.htm
- * ftp://download.intel.com/ial/home/sp/mmts098.pdf
+ * http://www.intel.com/content/dam/www/public/us/en/documents/
+ * technical-specifications/software-developers-hpet-spec-1-0a.pdf
*/
#define HPET_MMAP_SIZE 1024
#define HPET_ID_NUMBER 0x00001f00
#define HPET_ID_REV 0x000000ff
#define HPET_ID_NUMBER_SHIFT 8
-
#define HPET_ID_VENDOR_SHIFT 16
-#define HPET_ID_VENDOR_8086 0x8086
#define HPET_CFG_ENABLE 0x001
#define HPET_CFG_LEGACY 0x002