Add -m(no-)spe, and e500 CPU definitions and support to clang
authorJustin Hibbits <jrh29@alumni.cwru.edu>
Sat, 15 Aug 2020 20:34:33 +0000 (21:34 +0100)
committerGianfranco Costamagna <locutusofborg@debian.org>
Sat, 15 Aug 2020 20:34:33 +0000 (21:34 +0100)
Origin: https://reviews.llvm.org/D49754
Last-Update: 2018-12-04

Gbp-Pq: Topic powerpcspe
Gbp-Pq: Name D49754-powerpcspe-clang.diff

clang/include/clang/Driver/Options.td
clang/lib/Basic/Targets/PPC.cpp
clang/lib/Basic/Targets/PPC.h
clang/test/Driver/ppc-features.cpp
clang/test/Misc/target-invalid-cpu-note.c
clang/test/Preprocessor/init.c

index d02d9744d78d43276ff7188708fe18ad63fced28..a12c146e24bd2ffeda6df6bc850f0a58dbd4ae0d 100644 (file)
@@ -2180,6 +2180,8 @@ def faltivec : Flag<["-"], "faltivec">, Group<f_Group>, Flags<[DriverOption]>;
 def fno_altivec : Flag<["-"], "fno-altivec">, Group<f_Group>, Flags<[DriverOption]>;
 def maltivec : Flag<["-"], "maltivec">, Group<m_ppc_Features_Group>;
 def mno_altivec : Flag<["-"], "mno-altivec">, Group<m_ppc_Features_Group>;
+def mspe : Flag<["-"], "mspe">, Group<m_ppc_Features_Group>;
+def mno_spe : Flag<["-"], "mno-spe">, Group<m_ppc_Features_Group>;
 def mvsx : Flag<["-"], "mvsx">, Group<m_ppc_Features_Group>;
 def mno_vsx : Flag<["-"], "mno-vsx">, Group<m_ppc_Features_Group>;
 def msecure_plt : Flag<["-"], "msecure-plt">, Group<m_ppc_Features_Group>;
index 6cfbed1713e13f90126aa337ccb5b5c74bee7e7a..e82feec6f27c2e5c0a123966214d9c2467e939d7 100644 (file)
@@ -54,6 +54,8 @@ bool PPCTargetInfo::handleTargetFeatures(std::vector<std::string> &Features,
       HasFloat128 = true;
     } else if (Feature == "+power9-vector") {
       HasP9Vector = true;
+    } else if (Feature == "+spe") {
+      HasSPE = true;
     }
     // TODO: Finish this list and add an assert that we've handled them
     // all.
@@ -161,6 +163,8 @@ void PPCTargetInfo::getTargetDefines(const LangOptions &Opts,
     Builder.defineMacro("__VEC__", "10206");
     Builder.defineMacro("__ALTIVEC__");
   }
+  if (HasSPE)
+    Builder.defineMacro("__SPE__");
   if (HasVSX)
     Builder.defineMacro("__VSX__");
   if (HasP8Vector)
@@ -334,6 +338,7 @@ bool PPCTargetInfo::hasFeature(StringRef Feature) const {
       .Case("extdiv", HasExtDiv)
       .Case("float128", HasFloat128)
       .Case("power9-vector", HasP9Vector)
+      .Case("spe", HasSPE)
       .Default(false);
 }
 
@@ -443,16 +448,16 @@ ArrayRef<TargetInfo::AddlRegName> PPCTargetInfo::getGCCAddlRegNames() const {
 }
 
 static constexpr llvm::StringLiteral ValidCPUNames[] = {
-    {"generic"}, {"440"},         {"450"},     {"601"},    {"602"},
-    {"603"},     {"603e"},        {"603ev"},   {"604"},    {"604e"},
-    {"620"},     {"630"},         {"g3"},      {"7400"},   {"g4"},
-    {"7450"},    {"g4+"},         {"750"},     {"970"},    {"g5"},
-    {"a2"},      {"a2q"},         {"e500mc"},  {"e5500"},  {"power3"},
-    {"pwr3"},    {"power4"},      {"pwr4"},    {"power5"}, {"pwr5"},
-    {"power5x"}, {"pwr5x"},       {"power6"},  {"pwr6"},   {"power6x"},
-    {"pwr6x"},   {"power7"},      {"pwr7"},    {"power8"}, {"pwr8"},
-    {"power9"},  {"pwr9"},        {"powerpc"}, {"ppc"},    {"powerpc64"},
-    {"ppc64"},   {"powerpc64le"}, {"ppc64le"},
+    {"generic"},   {"440"},       {"450"},         {"601"},     {"602"},
+    {"603"},       {"603e"},      {"603ev"},       {"604"},     {"604e"},
+    {"620"},       {"630"},       {"g3"},          {"7400"},    {"g4"},
+    {"7450"},      {"g4+"},       {"750"},         {"970"},     {"g5"},
+    {"a2"},        {"a2q"},       {"e500"},        {"e500mc"},  {"e5500"},
+    {"power3"},    {"pwr3"},      {"power4"},      {"pwr4"},    {"power5"},
+    {"pwr5"},      {"power5x"},   {"pwr5x"},       {"power6"},  {"pwr6"},
+    {"power6x"},   {"pwr6x"},     {"power7"},      {"pwr7"},    {"power8"},
+    {"pwr8"},      {"power9"},    {"pwr9"},        {"powerpc"}, {"ppc"},
+    {"powerpc64"}, {"ppc64"},     {"powerpc64le"}, {"ppc64le"},
 };
 
 bool PPCTargetInfo::isValidCPUName(StringRef Name) const {
index cbe7a9a2fa85eca92b5e23b242a1f3fc297ed2a8..4771dc65173bfb6720a6e130b57cddaf1b371a93 100644 (file)
@@ -45,7 +45,8 @@ class LLVM_LIBRARY_VISIBILITY PPCTargetInfo : public TargetInfo {
     ArchDefinePwr8 = 1 << 12,
     ArchDefinePwr9 = 1 << 13,
     ArchDefineA2 = 1 << 14,
-    ArchDefineA2q = 1 << 15
+    ArchDefineA2q = 1 << 15,
+    ArchDefine500v2 = 1 << 16
   } ArchDefineTypes;
 
 
@@ -66,6 +67,7 @@ class LLVM_LIBRARY_VISIBILITY PPCTargetInfo : public TargetInfo {
   bool HasBPERMD = false;
   bool HasExtDiv = false;
   bool HasP9Vector = false;
+  bool HasSPE = false;
 
 protected:
   std::string ABI;
@@ -145,6 +147,8 @@ public:
                         ArchDefinePwr6x | ArchDefinePwr6 | ArchDefinePwr5x |
                         ArchDefinePwr5 | ArchDefinePwr4 | ArchDefinePpcgr |
                         ArchDefinePpcsq)
+              .Cases("e500", "e500v2",
+                    ArchDefineName | ArchDefine500v2)
               .Default(ArchDefineNone);
     }
     return CPUKnown;
index 1cb6cee061c1dc7ae425005ed1d1d4ed407e4874..f6f2c78903d0609e3e086e8e74a827ba36c55c59 100644 (file)
 // RUN: %clang -target powerpc64-unknown-linux-gnu %s -mno-invariant-function-descriptors -minvariant-function-descriptors -### -o %t.o 2>&1 | FileCheck -check-prefix=CHECK-INVFUNCDESC %s
 // CHECK-INVFUNCDESC: "-target-feature" "+invariant-function-descriptors"
 
+// RUN: %clang -target powerpc-unknown-linux-gnu %s -mno-spe -mspe -### -o %t.o 2>&1 | FileCheck -check-prefix=CHECK-SPE %s
+// CHECK-SPE: "-target-feature" "+spe"
+
 // Assembler features
 // RUN: %clang -target powerpc64-unknown-linux-gnu %s -### -o %t.o -no-integrated-as 2>&1 | FileCheck -check-prefix=CHECK_BE_AS_ARGS %s
 // CHECK_BE_AS_ARGS: "-mppc64"
index babfaa9ffcb44fd3df1a95f52672f53dec45d3ed..8182afa390082a7cfb164c9e7ea42679e3be4f64 100644 (file)
@@ -79,7 +79,7 @@
 // PPC: error: unknown target CPU 'not-a-cpu'
 // PPC: note: valid target CPU values are: generic, 440, 450, 601, 602, 603,
 // PPC-SAME: 603e, 603ev, 604, 604e, 620, 630, g3, 7400, g4, 7450, g4+, 750,
-// PPC-SAME: 970, g5, a2, a2q, e500mc, e5500, power3, pwr3, power4, pwr4,
+// PPC-SAME: 970, g5, a2, a2q, e500, e500mc, e5500, power3, pwr3, power4, pwr4,
 // PPC-SAME: power5, pwr5, power5x, pwr5x, power6, pwr6, power6x, pwr6x, power7,
 // PPC-SAME: pwr7, power8, pwr8, power9, pwr9, powerpc, ppc, powerpc64, ppc64,
 // PPC-SAME: powerpc64le, ppc64le
index 770e52cc7843551815518cefce8296e10431dfbb..ea598e95269e4aaac8cd1bc43b47781cba09f526 100644 (file)
 //
 // PPC32-LINUX-NOT: _CALL_LINUX
 //
+// RUN: %clang_cc1 -E -dM -ffreestanding -triple=powerpc-unknown-linux-gnu -target-feature +spe < /dev/null | FileCheck -match-full-lines -check-prefix PPC32-SPE %s
+//
+// PPC32-SPE:#define __SPE__ 1
+//
 // RUN: %clang_cc1 -E -dM -ffreestanding -triple=powerpc-apple-darwin8 < /dev/null | FileCheck -match-full-lines -check-prefix PPC-DARWIN %s
 //
 // PPC-DARWIN:#define _ARCH_PPC 1