x86emul: support VPCLMULQDQ insns
authorJan Beulich <jbeulich@suse.com>
Wed, 17 Jul 2019 13:41:20 +0000 (15:41 +0200)
committerJan Beulich <jbeulich@suse.com>
Wed, 17 Jul 2019 13:41:20 +0000 (15:41 +0200)
commitfe3a0b15ef9c17b8788fb5cda3fd6d98d5f6e448
tree661d99b871763e66b0bb522331ff0e40bfa8571c
parent0dffe771ee4901bc4bd59ce41b218fd7c4a28b02
x86emul: support VPCLMULQDQ insns

As to the feature dependency adjustment, while strictly speaking AVX is
a sufficient prereq (to have YMM registers), 256-bit vectors of integers
have got fully introduced with AVX2 only. Sadly gcc can't be used as a
reference here: They don't provide any AVX512-independent built-in at
all.

Along the lines of PCLMULQDQ, since the insns here and in particular
their memory access patterns follow the usual scheme, I didn't think it
was necessary to add a contrived test specifically for them, beyond the
Disp8 scaling one.

Signed-off-by: Jan Beulich <jbeulich@suse.com>
Acked-by: Andrew Cooper <andrew.cooper3@citrix.com>
tools/tests/x86_emulator/evex-disp8.c
tools/tests/x86_emulator/x86-emulate.h
xen/arch/x86/x86_emulate/x86_emulate.c
xen/include/asm-x86/cpufeature.h
xen/include/public/arch-x86/cpufeatureset.h
xen/tools/gen-cpuid.py