drm/vc4: Adjust modes in DSI to work around the integer PLL divider.

drm/vc4: Adjust modes in DSI to work around the integer PLL divider.

BCM2835's PLLD_DSI1 divider doesn't give us many choices for our pixel
clocks, so to support panels on the Raspberry Pi we need to set a
higher pixel clock rate than requested and adjust the mode we program
to extend out the HFP so that the refresh rate matches.

v2: Drop an unfinished comment (caught by Noralf)

Signed-off-by: Eric Anholt <eric@anholt.net>
Link: http://patchwork.freedesktop.org/patch/msgid/20170511235625.22427-2-eric@anholt.net
Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch>
(cherry picked from commit 86c1b9eff3f27c82bceabd3b5c76376b26d26e92)