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(parent: 0681fdb) | patch
x86/HVM: limit flushing on cache attribute pinning adjustments
authorJan Beulich <jbeulich@suse.com>
Fri, 4 Mar 2016 13:15:53 +0000 (14:15 +0100)
committerJan Beulich <jbeulich@suse.com>
Fri, 4 Mar 2016 13:15:53 +0000 (14:15 +0100)
commitefd5c610a2c33bd7ad36264a0fc5add9269a26dd
treef22c9c3b40bf6bd34e5dd799a8c34e510508804ftree | snapshot
parent0681fdbd36acfa314079804d3c30dc1c206e2685commit | diff
x86/HVM: limit flushing on cache attribute pinning adjustments

Avoid cache flush on EPT when removing a UC- range, since when used
this type gets converted to UC anyway (there's no UC- among the types
valid in MTRRs and hence EPT's emt field).

We might further wwant to consider only forcing write buffer flushes
when removing WC ranges.

Signed-off-by: Jan Beulich <jbeulich@suse.com>
Reviewed-by: Andrew Cooper <andrew.cooper3@citrix.com>
xen/arch/x86/hvm/mtrr.c diff | blob | history
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