x86/hvm: fix ISA IRQ 0 handling when set as lowest priority mode in IO APIC

x86/hvm: fix ISA IRQ 0 handling when set as lowest priority mode in IO APIC

Lowest priority destination mode does allow the vIO APIC code to
select a vCPU to inject the interrupt to, but the selected vCPU must
be part of the possible destinations configured for such IO APIC pin.

Fix the code in order to only force vCPU 0 if it's part of the
listed destinations.

Signed-off-by: Roger Pau Monné <roger.pau@citrix.com>
Reviewed-by: Andrew Cooper <andrew.cooper3@citrix.com>