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(parent: ab5bfc0) | patch
x86/hvm: fix ISA IRQ 0 handling when set as lowest priority mode in IO APIC
authorRoger Pau Monne <roger.pau@citrix.com>
Mon, 27 Jul 2020 17:05:37 +0000 (19:05 +0200)
committerAndrew Cooper <andrew.cooper3@citrix.com>
Tue, 28 Jul 2020 18:33:28 +0000 (19:33 +0100)
commitdc036ab9d506b997777c7656d9e6e4fa32bc582e
tree5d9f1cf58ad36f641aa254f4c0334793cfaa7d3dtree | snapshot
parentab5bfc049e8e04bca66d591ab439d2341623f83ccommit | diff
x86/hvm: fix ISA IRQ 0 handling when set as lowest priority mode in IO APIC

Lowest priority destination mode does allow the vIO APIC code to
select a vCPU to inject the interrupt to, but the selected vCPU must
be part of the possible destinations configured for such IO APIC pin.

Fix the code in order to only force vCPU 0 if it's part of the
listed destinations.

Signed-off-by: Roger Pau Monné <roger.pau@citrix.com>
Reviewed-by: Andrew Cooper <andrew.cooper3@citrix.com>
xen/arch/x86/hvm/vioapic.c diff | blob | history
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