x86/paging: restrict physical address width reported to guests
authorJan Beulich <jbeulich@suse.com>
Tue, 19 Oct 2021 08:08:30 +0000 (10:08 +0200)
committerJan Beulich <jbeulich@suse.com>
Tue, 19 Oct 2021 08:08:30 +0000 (10:08 +0200)
commitb7635526acffbe4ad8ad16fd92812c57742e54c2
tree2405a63b84d384d917579c91693173295af7868a
parent525eac931794434593c39a1d1cd739ad8b326e27
x86/paging: restrict physical address width reported to guests

Modern hardware may report more than 48 bits of physical address width.
For paging-external guests our P2M implementation does not cope with
larger values. Telling the guest of more available bits means misleading
it into perhaps trying to actually put some page there (like was e.g.
intermediately done in OVMF for the shared info page).

While there also convert the PV check to a paging-external one (which in
our current code base are synonyms of one another anyway).

Fixes: 5dbd60e16a1f ("x86/shadow: Correct guest behaviour when creating PTEs above maxphysaddr")
Signed-off-by: Jan Beulich <jbeulich@suse.com>
Reviewed-by: Roger Pau Monné <roger.pau@citrix.com>
xen/include/asm-x86/paging.h