x86/vtx: Fixes to Haswell/Broadwell LBR TSX errata
authorAndrew Cooper <andrew.cooper3@citrix.com>
Mon, 25 Nov 2019 15:19:32 +0000 (16:19 +0100)
committerJan Beulich <jbeulich@suse.com>
Mon, 25 Nov 2019 15:19:32 +0000 (16:19 +0100)
commitb12609b76c918d866cd4abf4d6640fe41d3e7912
treea12b5975029e6764ce28b53951e0a015548b3a8b
parenta08fdb832f24880a887f881e71cb27fa8d8c6a81
x86/vtx: Fixes to Haswell/Broadwell LBR TSX errata

Cross reference and list all errata, now that they are published.

These errata are specific to Haswell/Broadwell.  They should have model and
vendor checks, as Intel isn't the only vendor to implement VT-x.

All affected models use the same MSR indicies, so these can be hard coded
rather than looking up and storing constant values.

Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Reviewed-by: Jan Beulich <jbeulich@suse.com>
Reviewed-by: Kevin Tian <kevin.tian@intel.com>
master commit: f51d4a19427674491eaecef85c551613450188c5
master date: 2019-10-29 19:27:40 +0000
xen/arch/x86/hvm/vmx/vmx.c