[PATCH 08/79] [Backport to 15] Implement SPV_INTEL_tensor_float32_conversion extensio...
authorStanley Gambarin <stanley.gambarin@intel.com>
Fri, 11 Nov 2022 10:31:34 +0000 (02:31 -0800)
committerAndreas Beckmann <anbe@debian.org>
Thu, 8 Feb 2024 21:48:18 +0000 (22:48 +0100)
commitaf5dd3f6d825c1e95873904c3b42bbd48a7197d8
tree768ac4592f10a5eda1bf6a316f055250aec168c4
parent0018745991a2c3c7e44c38e538a6c9ddc000d64b
[PATCH 08/79] [Backport to 15] Implement SPV_INTEL_tensor_float32_conversion extension (#1656) (#1700)

This extension adds conversion instruction from float to tensor float (TF32)
data format. TF32 uses 1 bit for a sign, 8 bits for an exponent and 10 bits
for a fraction. This extension doesn’t introduce TF32 type in SPIR-V, instead
instruction below uses 32-bit float type to represent TF32 value.

Spec: https://github.com/intel/llvm/pull/6990

Co-authored-by: Dmitry Sidorov <dmitry.sidorov@intel.com>
Gbp-Pq: Name 0008-Backport-to-15-Implement-SPV_INTEL_tensor_float32_co.patch
include/LLVMSPIRVExtensions.inc
lib/SPIRV/libSPIRV/SPIRVInstruction.h
lib/SPIRV/libSPIRV/SPIRVNameMapEnum.h
lib/SPIRV/libSPIRV/SPIRVOpCodeEnumInternal.h
lib/SPIRV/libSPIRV/spirv_internal.hpp
test/transcoding/SPV_INTEL_tensor_float32_conversion/convert_tensor_float32.ll [new file with mode: 0644]