x86emul: support WBNOINVD
authorJan Beulich <jbeulich@suse.com>
Tue, 3 Sep 2019 12:48:19 +0000 (14:48 +0200)
committerJan Beulich <jbeulich@suse.com>
Tue, 3 Sep 2019 12:48:19 +0000 (14:48 +0200)
commitad3abc47dd23c19c9a66986b58e45172ca3ea1ed
treec60cea2a47a5088ea95f74b50aad2f66c137684f
parentc0536ed315b26e93d62bcbc296764d6a35b13ae1
x86emul: support WBNOINVD

Rev 037 of Intel's ISA extensions document does not state intercept
behavior for the insn (I've been unofficially told that the distinction
is going to be by exit qualification, as I would have assumed
considering that this way it's sufficiently transparent to unaware
software, as using WBINVD in place of WBNOINVD is always correct, just
less efficient). Similarly AMD's PM volume 2 version 3.31 only states
that both use the same VMEXIT, but not how to distinugish them (other
than by decoding the insn). Therefore in the HVM case for now it'll be
backed by the same ->wbinvd_intercept() handlers.

Use this occasion and also add the two missing table entries for
CLDEMOTE, which doesn't require any further changes to make work.

Signed-off-by: Jan Beulich <jbeulich@suse.com>
Reviewed-by: Paul Durrant <paul.durrant@citrix.com>
Reviewed-by: Andrew Cooper <andrew.cooper3@citrix.com>
tools/libxl/libxl_cpuid.c
tools/misc/xen-cpuid.c
xen/arch/x86/hvm/emulate.c
xen/arch/x86/pv/emul-priv-op.c
xen/arch/x86/x86_emulate/x86_emulate.c
xen/arch/x86/x86_emulate/x86_emulate.h
xen/include/asm-x86/system.h
xen/include/public/arch-x86/cpufeatureset.h