xen/arm: Add workaround for Cortex-A53 erratum #843419
authorLuca Fancellu <luca.fancellu@arm.com>
Thu, 10 Dec 2020 10:42:58 +0000 (10:42 +0000)
committerStefano Stabellini <sstabellini@kernel.org>
Fri, 19 Mar 2021 19:33:22 +0000 (12:33 -0700)
commita8a6736c976f1ab14439952bd78dfd5bf3daffe9
tree9fa3a8833da638c3cd1390949979e35bbb9d63b8
parent8d6755fb4466a0c9af6c8953392327022ec61428
xen/arm: Add workaround for Cortex-A53 erratum #843419

On the Cortex A53, when executing in AArch64 state, a load or store instruction
which uses the result of an ADRP instruction as a base register, or which uses
a base register written by an instruction immediately after an ADRP to the
same register, might access an incorrect address.

The workaround is to enable the linker flag --fix-cortex-a53-843419
if present, to check and fix the affected sequence. Otherwise print a warning
that Xen may be susceptible to this errata

Signed-off-by: Luca Fancellu <luca.fancellu@arm.com>
Reviewed-by: Bertrand Marquis <bertrand.marquis@arm.com>
Reviewed-by: Stefano Stabellini <sstabellini@kernel.org>
(cherry picked from commit d81133d45d81d35a4e7445778bfd1179190cbd31)
docs/misc/arm/silicon-errata.txt
xen/arch/arm/Kconfig
xen/arch/arm/Makefile
xen/scripts/Kbuild.include