drm/amd/powerplay: fix vce cg logic error on CZ/St.
authorRex Zhu <Rex.Zhu@amd.com>
Tue, 10 Jan 2017 11:26:49 +0000 (19:26 +0800)
committerRaspbian kernel package updater <root@raspbian.org>
Sun, 23 Jul 2017 03:05:57 +0000 (03:05 +0000)
commita1696ab2a8b3c8688c7f30f52095b2fe3608d2a5
treeeb7fca976a2ebca35e0fedf45dd796fb89fb48f9
parent5aee5e84407df5798d69d6d108446996db1a6a76
drm/amd/powerplay: fix vce cg logic error on CZ/St.

[ Upstream commit 3731d12dce83d47b357753ffc450ce03f1b49688 ]

can fix Bug 191281: vce ib test failed.

when vce idle, set vce clock gate, so the clock
in vce domain will be disabled.
when need to encode, disable vce clock gate,
enable the clocks to vce engine.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Sasha Levin <alexander.levin@verizon.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
drivers/gpu/drm/amd/powerplay/hwmgr/cz_clockpowergating.c