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x86/cpuid: Fix Lisbon/Magny-Cours Opterons WRT SSSE3/SSE4A
authorAndrew Cooper <andrew.cooper3@citrix.com>
Tue, 19 Nov 2019 16:40:26 +0000 (16:40 +0000)
committerAndrew Cooper <andrew.cooper3@citrix.com>
Wed, 20 Nov 2019 12:37:59 +0000 (12:37 +0000)
commita0bfdf64d9d124fcc1f7ff194e0a46a7e2a90f34
tree54c85b7a3bbd0b5cbe6bccb226cd6e4d7bd81beatree | snapshot
parent0d2791b007436f83cc8cb922acb1849a3ff31f3acommit | diff
x86/cpuid: Fix Lisbon/Magny-Cours Opterons WRT SSSE3/SSE4A

c/s ff66ccefe5 "x86/CPUID: adjust SSEn dependencies" made SSE4A depend on
SSSE3, but these processors really do have have SSE4A without SSSE3.

This manifests as an upgrade regression, as the SSE4A feature disappears from
view.

Adjust the SSE4A feature to depend on SSE3 rather than SSSE3.

Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Reviewed-by: Jan Beulich <jbeulich@suse.com>
Release-acked-by: Juergen Gross <jgross@suse.com>
xen/tools/gen-cpuid.py diff | blob | history
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