[PATCH] riscv: sifive: fu740: reduce DDR speed from 1866MT/s to 1600MT/s
authorthomas.perrot@bootlin.com <thomas.perrot@bootlin.com>
Thu, 22 Feb 2024 14:52:03 +0000 (15:52 +0100)
committerVagrant Cascadian <vagrant@debian.org>
Fri, 19 Apr 2024 18:32:03 +0000 (11:32 -0700)
commit96c50ac7a21342143e0e7695db63b9a0c34be253
treeb2478efcff0063df12432b3e55e3198bd140418d
parent7c6ecb7f007759a5c025925c771a28b725178691
[PATCH] riscv: sifive: fu740: reduce DDR speed from 1866MT/s to 1600MT/s

To: u-boot@lists.denx.de
Cc: Thomas Perrot <thomas.perrot@bootlin.com>
Message-ID: <20240222145203.2659671-1-thomas.perrot@bootlin.com>
Origin: https://patchwork.ozlabs.org/project/uboot/patch/20240222145203.2659671-1-thomas.perrot@bootlin.com/

It appears that there is some timing marginality either in the
board layout or the SoC that results in occasional data corruption
on some boards.
We observed this issue on some of the new HiFive Unmatched RevB
boards during volume production as well as some of the original
HiFive Unmatched boards from 2021 in our possession. This means
that there are other boards out there that might have the issue
too.

We have done some limited testing with DDR4 at 1600MT/s and
faulty boards (failing at 1866MT/s) passed.
We plan further testing after we procure a temperature chamber.

Signed-off-by: Thomas Perrot <thomas.perrot@bootlin.com>
Gbp-Pq: Topic riscv64
Gbp-Pq: Name riscv-sifive-fu740-reduce-DDR-speed-from-1866MT-s-to-1600MT-s.patch
arch/riscv/dts/fu740-c000-u-boot.dtsi