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ARM: GICv2: fix GICH_V2_LR definitions
authorAndre Przywara <andre.przywara@linaro.org>
Fri, 9 Mar 2018 15:11:33 +0000 (15:11 +0000)
committerJulien Grall <julien.grall@arm.com>
Mon, 12 Mar 2018 11:45:36 +0000 (11:45 +0000)
commit966f154c58bacf07690135d7da3f1d5281d84ab0
tree8c2ed19ffb90769055333c6edd9b25aadda89c9dtree | snapshot
parentbd04d3b3d7aa1311a8e87321a398ace978ed7a53commit | diff
ARM: GICv2: fix GICH_V2_LR definitions

The bit definition for the CPUID mask in the GICv2 LR register was
wrong, fortunately the current implementation does not use that bit.
Fix it up (it's starting at bit 10, not bit 9) and clean up some
nearby definitions on the way.
This will be used by the new VGIC shortly.

Signed-off-by: Andre Przywara <andre.przywara@linaro.org>
Reviewed-by: Julien Grall <julien.grall@arm.com>
xen/arch/arm/gic-v2.c diff | blob | history
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