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(parent: e6a760b) | patch
x86/spec-ctrl: Enumeration for PBRSB_NO
authorAndrew Cooper <andrew.cooper3@citrix.com>
Mon, 15 Aug 2022 13:34:30 +0000 (15:34 +0200)
committerJan Beulich <jbeulich@suse.com>
Mon, 15 Aug 2022 13:34:30 +0000 (15:34 +0200)
commit940fc00e02cbc8a202b3a072b9e33a3fe74da809
treeab58e99cf487ef58b3903163c12658ed1ae03a83tree | snapshot
parente6a760b8b1ce844f171594ce19856bf7e51b0509commit | diff
x86/spec-ctrl: Enumeration for PBRSB_NO

The PBRSB_NO bit indicates that the CPU is not vulnerable to the Post-Barrier
RSB speculative vulnerability.

Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Reviewed-by: Jan Beulich <jbeulich@suse.com>
master commit: b874e47eb13feb75be3ee7b5dc4ae9c97d80d774
master date: 2022-08-11 16:19:50 +0100
xen/arch/x86/msr.c diff | blob | history
xen/arch/x86/spec_ctrl.c diff | blob | history
xen/include/asm-x86/msr-index.h diff | blob | history
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