ARM: evtchn: Handle level triggered IRQs correctly
authorAndre Przywara <andre.przywara@linaro.org>
Fri, 5 Jan 2018 17:57:32 +0000 (17:57 +0000)
committerStefano Stabellini <sstabellini@kernel.org>
Tue, 27 Mar 2018 19:44:06 +0000 (12:44 -0700)
commit885aff8e42efbb6a290919efb194509429b3a9e7
treedff41a6c52de1a7931a1919dc26626e43ddb524c
parentb9db96f71a7466b3a46dc08af1417b040ac613b6
ARM: evtchn: Handle level triggered IRQs correctly

The event channel IRQ has level triggered semantics, however the current
VGIC treats everything as edge triggered.
To correctly process those IRQs, we have to lower the (virtual) IRQ line
at some point in time, depending on whether the interrupt condition
still prevails.
Check the per-VCPU evtchn_upcall_pending variable to make the interrupt
line match its status, and call this function upon every hypervisor
entry.

Signed-off-by: Andre Przywara <andre.przywara@linaro.org>
Reviewed-by: Julien Grall <julien.grall@arm.com>
Acked-by: Stefano Stabellini <sstabellini@kernel.org>
xen/arch/arm/domain.c
xen/arch/arm/traps.c
xen/include/asm-arm/event.h