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(parent: e35cd2c) | patch
x86: Expose TSC adjust to HVM guest
authorLiu, Jinsong <jinsong.liu@intel.com>
Wed, 26 Sep 2012 10:14:30 +0000 (12:14 +0200)
committerLiu, Jinsong <jinsong.liu@intel.com>
Wed, 26 Sep 2012 10:14:30 +0000 (12:14 +0200)
commit6fd5f43ad974e8759a9c7bb6c61987fc214f27cc
tree83cd481a33d4b22c22dabf74f1a945fa7f521628tree | snapshot
parente35cd2cce4fe119ef63913f3eb7443b7f5b57d75commit | diff
x86: Expose TSC adjust to HVM guest

Intel latest SDM (17.13.3) release a new MSR CPUID.7.0.EBX[1]=1
indicates TSC_ADJUST MSR 0x3b is supported.

This patch expose it to hvm guest.

Signed-off-by: Liu, Jinsong <jinsong.liu@intel.com>
Committed-by: Jan Beulich <jbeulich@suse.com>
tools/libxc/xc_cpufeature.h diff | blob | history
tools/libxc/xc_cpuid_x86.c diff | blob | history
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