[PATCH] Fix mterp assembly to use uxtw instead of lsl where needed.

[PATCH] Fix mterp assembly to use uxtw instead of lsl where needed.

Bug: https://bugs.llvm.org/show_bug.cgi?id=41504
Origin: https://android-review.googlesource.com/c/platform/art/+/940018

The old instructions are invalid according to the ARM spec.

Event though UXTW and LSL are aliases this is binary change:
"add x0, x1, w2, lsl #1" was invalid and would be treated as
"add x0, x1, x2, uxtx #1" which would keep the high bits.

With uxtw, we ignore the high bits, as expected in code.

Test: test.py -r --target --interpreter
Change-Id: I66f67ccc5a401d0cf6ac5b42d41d8df26a190046

Gbp-Pq: Name fix-mterp-assembly-to-use-uxtw-instead-of-lsl-where-needed.patch