x86/svm: Use flush-by-asid when available
authorAndrew Cooper <andrew.cooper3@citrix.com>
Tue, 12 Feb 2019 18:37:04 +0000 (18:37 +0000)
committerAndrew Cooper <andrew.cooper3@citrix.com>
Thu, 7 May 2020 12:50:38 +0000 (13:50 +0100)
commit64b1da5a2fcf37e3542c277fde194ff3e8bba2d2
tree3f9d95b9d4aa85fc667c3f3fa0a65eea480fa66a
parent06e6f3176804b7eabfd028ec3777a69668fad36a
x86/svm: Use flush-by-asid when available

AMD Fam15h processors introduced the flush-by-asid feature, for more fine
grain flushing purposes.

Flushing everything including ASID 0 (i.e. Xen context) is an an unnecesserily
large hammer, and never necessary in the context of guest TLBs needing
invalidating.

When available, use TLB_CTRL_FLUSH_ASID in preference to TLB_CTRL_FLUSH_ALL.

Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Reviewed-by: Roger Pau Monné <roger.pau@citrix.com>
Reviewed-by: Jan Beulich <jbeulich@suse.com>
xen/arch/x86/hvm/svm/asid.c
xen/include/asm-x86/hvm/svm/svm.h