[PATCH 08/79] [Backport to 15] Implement SPV_INTEL_tensor_float32_conversion extensio...
authorStanley Gambarin <stanley.gambarin@intel.com>
Fri, 11 Nov 2022 10:31:34 +0000 (02:31 -0800)
committerAndreas Beckmann <anbe@debian.org>
Thu, 14 Mar 2024 19:01:08 +0000 (20:01 +0100)
commit61f1097c8897bd1c9556dda18175826834bb4094
tree37dd02e7f5888e4209f20f6a8be4d07224ada86a
parentb59276b1b356dd16662c2aaea3828236abd43305
[PATCH 08/79] [Backport to 15] Implement SPV_INTEL_tensor_float32_conversion extension (#1656) (#1700)

This extension adds conversion instruction from float to tensor float (TF32)
data format. TF32 uses 1 bit for a sign, 8 bits for an exponent and 10 bits
for a fraction. This extension doesn’t introduce TF32 type in SPIR-V, instead
instruction below uses 32-bit float type to represent TF32 value.

Spec: https://github.com/intel/llvm/pull/6990

Co-authored-by: Dmitry Sidorov <dmitry.sidorov@intel.com>
Gbp-Pq: Name 0008-Backport-to-15-Implement-SPV_INTEL_tensor_float32_co.patch
include/LLVMSPIRVExtensions.inc
lib/SPIRV/libSPIRV/SPIRVInstruction.h
lib/SPIRV/libSPIRV/SPIRVNameMapEnum.h
lib/SPIRV/libSPIRV/SPIRVOpCodeEnumInternal.h
lib/SPIRV/libSPIRV/spirv_internal.hpp
test/transcoding/SPV_INTEL_tensor_float32_conversion/convert_tensor_float32.ll [new file with mode: 0644]