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(parent: 2a4b847) | patch
x86/vPMU: constrain MSR_IA32_DS_AREA loads
authorJan Beulich <jbeulich@suse.com>
Mon, 21 Dec 2015 12:38:22 +0000 (13:38 +0100)
committerJan Beulich <jbeulich@suse.com>
Mon, 21 Dec 2015 12:38:22 +0000 (13:38 +0100)
commit5d0683a4f5b56e6d7f3f68727bf218f75782db8e
treed519021a69c05ddb154d25c308c0a7a942ca2659tree | snapshot
parent2a4b84706e5e67be4e3e3a023d4a0a7169b19b45commit | diff
x86/vPMU: constrain MSR_IA32_DS_AREA loads

For one, loading the MSR with a possibly non-canonical address was
possible since the verification is conditional, while the MSR load
wasn't. And then for PV guests we need to further limit the range of
valid addresses to exclude the hypervisor range.

Signed-off-by: Jan Beulich <jbeulich@suse.com>
Reviewed-by: Boris Ostrovsky <boris.ostrovsky@oracle.com>
Acked-by: Kevin Tian <kevin.tian@intel.com>
xen/arch/x86/cpu/vpmu_intel.c diff | blob | history
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