x86/pv: Hide more EFER bits from PV guests
authorAndrew Cooper <andrew.cooper3@citrix.com>
Tue, 20 Mar 2018 19:36:40 +0000 (19:36 +0000)
committerAndrew Cooper <andrew.cooper3@citrix.com>
Mon, 7 May 2018 10:52:57 +0000 (11:52 +0100)
commit589263031c04e2ba527783b4e04e8df27d364769
treead07c2fa9f566e8f2d86d59a7d84bf96943aad59
parent3abe241190af31760c506a9f32bf25e958ea060c
x86/pv: Hide more EFER bits from PV guests

We don't advertise SVM in CPUID so a PV guest shouldn't be under the
impression that it can use SVM functionality, but despite this, it really
shouldn't see SVME set when reading EFER.

On Intel processors, 32bit PV guests don't see, and can't use SYSCALL.

Introduce EFER_KNOWN_MASK to whitelist the features Xen knows about, and use
this to clamp the guests view.

Take the opportunity to reuse the mask to simplify svm_vmcb_isvalid(), and
change "undefined" to "unknown" in the print message, as there is at least
EFER.TCE (Translation Cache Extension) defined but unknown to Xen.

Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Reviewed-by: Boris Ostrovsky <boris.ostrovsky@oracle.com>
Reviewed-by: Jan Beulich <jbeulich@suse.com>
Release-acked-by: Juergen Gross <jgross@suse.com>
xen/arch/x86/hvm/svm/svmdebug.c
xen/arch/x86/pv/emul-priv-op.c
xen/include/asm-x86/msr-index.h