VT-d: conditionalize IOTLB register offset check
authorJan Beulich <jbeulich@suse.com>
Wed, 24 Nov 2021 10:12:44 +0000 (11:12 +0100)
committerJan Beulich <jbeulich@suse.com>
Wed, 24 Nov 2021 10:12:44 +0000 (11:12 +0100)
commit5449ba84e99849ee2339fd79f9717e10113d702d
treeaca6e6f7e28b3772fe8e80491bb59a986e792646
parent08826a044ebfefc429aaecb861dc31051f2bb288
VT-d: conditionalize IOTLB register offset check

As of commit 6773b1a7584a ("VT-d: Don't assume register-based
invalidation is always supported") we don't (try to) use register based
invalidation anymore when that's not supported by hardware. Hence
there's also no point in the respective check, avoiding pointless IOMMU
initialization failure. After all the spec (version 3.3 at the time of
writing) doesn't say what the respective Extended Capability Register
field would contain in such a case.

Signed-off-by: Jan Beulich <jbeulich@suse.com>
Reviewed-by: Kevin Tian <kevin.tian@intel.com>
xen/drivers/passthrough/vtd/iommu.c