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(parent: 971d299) | patch
x86/Intel: drop another 32-bit leftover
authorJan Beulich <jbeulich@suse.com>
Wed, 3 Jan 2018 10:02:10 +0000 (11:02 +0100)
committerJan Beulich <jbeulich@suse.com>
Wed, 3 Jan 2018 10:02:10 +0000 (11:02 +0100)
commit4fdc932b3cced15d6e73c94ae0192d989fefdc90
tree8314cf923f8b7862cea586863688aa7aa4c00038tree | snapshot
parent971d299c04df379734d10c44d637433e9e564f36commit | diff
x86/Intel: drop another 32-bit leftover

None of the models MISC_ENABLE MSR access is excluded for support 64-bit
mode - drop the conditional from early_init_intel(). Also convert
pointless rdmsr_safe() elsewhere to rdmsrl().

Signed-off-by: Jan Beulich <jbeulich@suse.com>
Reviewed-by: Andrew Cooper <andrew.cooper3@citrix.com>
xen/arch/x86/cpu/intel.c diff | blob | history
xen/arch/x86/pv/emul-priv-op.c diff | blob | history
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