x86/spec-ctrl: Use IST RSB protection for !SVM systems
authorAndrew Cooper <andrew.cooper3@citrix.com>
Mon, 15 Aug 2022 13:31:49 +0000 (15:31 +0200)
committerJan Beulich <jbeulich@suse.com>
Mon, 15 Aug 2022 13:31:49 +0000 (15:31 +0200)
commit4e351880f68e50fe1479c36a30e0e4e03d160c34
tree3df11b416712d82ec8177a52f5ee7f76fcb7b17d
parent48b67651746f3124b0d5d30147180f1238d2e9c6
x86/spec-ctrl: Use IST RSB protection for !SVM systems

There is a corner case where a VT-x guest which manages to reliably trigger
non-fatal #MC's could evade the rogue RSB speculation protections that were
supposed to be in place.

This is a lack of defence in depth; Xen does not architecturally execute more
RET than CALL instructions, so an attacker would have to locate a different
gadget (e.g. SpectreRSB) first to execute a transient path of excess RET
instructions.

Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Reviewed-by: Jan Beulich <jbeulich@suse.com>
master commit: e570e8d520ab542d8d35666b95cb3a0125b7b110
master date: 2022-08-05 12:16:24 +0100
xen/arch/x86/spec_ctrl.c