x86/cpu/mce: Add Hygon Dhyana support to the MCA infrastructure
authorPu Wen <puwen@hygon.cn>
Thu, 4 Apr 2019 13:46:23 +0000 (21:46 +0800)
committerAndrew Cooper <andrew.cooper3@citrix.com>
Thu, 6 Jun 2019 14:28:21 +0000 (15:28 +0100)
commit4aedd96d8d237a0347d01f32d4ca7ece77784f9d
tree50ef0aa507c3b45449f64eed8e79b77e9a34ed41
parent4d94642626048e47f29a9505f892b4004002dcbe
x86/cpu/mce: Add Hygon Dhyana support to the MCA infrastructure

The machine check architecture for Hygon Dhyana CPU is similar to the
AMD family 17h one. Add vendor checking for Hygon Dhyana to share the
code path of AMD family 17h.

Signed-off-by: Pu Wen <puwen@hygon.cn>
Acked-by: Jan Beulich <jbeulich@suse.com>
[Rebase over 0cd074144cb "x86/cpu: Renumber X86_VENDOR_* to form a bitmap"]
Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
xen/arch/x86/cpu/common.c
xen/arch/x86/cpu/mcheck/amd_nonfatal.c
xen/arch/x86/cpu/mcheck/mce.c
xen/arch/x86/cpu/mcheck/mce_amd.c
xen/arch/x86/cpu/mcheck/non-fatal.c
xen/arch/x86/cpu/mcheck/vmce.c