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(parent: fba0049) | patch
x86/vioapic: bind interrupts to PVH Dom0
authorRoger Pau Monne <roger.pau@citrix.com>
Fri, 23 Jun 2017 09:59:51 +0000 (10:59 +0100)
committerAndrew Cooper <andrew.cooper3@citrix.com>
Mon, 26 Jun 2017 13:32:46 +0000 (14:32 +0100)
commit3e68095ef9ba1bee90ce09344f3367f166e5a3d7
treecddffeeefe3e6aa3228c5133040e1c8ed5201220tree | snapshot
parentfba004942682b1e24fc1a5bc70048a3a5a4ecc18commit | diff
x86/vioapic: bind interrupts to PVH Dom0

Add the glue in order to bind the PVH Dom0 GSI from bare metal. This
is done when Dom0 unmasks the vIO APIC pins, by fetching the current
pin settings and setting up the PIRQ, which will then be bound to
Dom0.

Signed-off-by: Roger Pau Monné <roger.pau@citrix.com>
Reviewed-by: Jan Beulich <jbeulich@suse.com>
xen/arch/x86/hvm/vioapic.c diff | blob | history
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