x86/PoD: handle intermediate page orders in p2m_pod_cache_add()
authorJan Beulich <jbeulich@suse.com>
Tue, 23 Nov 2021 12:29:54 +0000 (13:29 +0100)
committerJan Beulich <jbeulich@suse.com>
Tue, 23 Nov 2021 12:29:54 +0000 (13:29 +0100)
commit3ae94651cf0b08f86f1aba012f6bdd42c449c68b
treef276196295919a98ac9e1df550c7e582ffe57b44
parent7f654ea88ee6100f5948f383a38254be8c28a255
x86/PoD: handle intermediate page orders in p2m_pod_cache_add()

p2m_pod_decrease_reservation() may pass pages to the function which
aren't 4k, 2M, or 1G. Handle all intermediate orders as well, to avoid
hitting the BUG() at the switch() statement's "default" case.

This is CVE-2021-28708 / part of XSA-388.

Fixes: 3c352011c0d3 ("x86/PoD: shorten certain operations on higher order ranges")
Signed-off-by: Jan Beulich <jbeulich@suse.com>
Reviewed-by: Roger Pau Monné <roger.pau@citrix.com>
master commit: 8ec13f68e0b026863d23e7f44f252d06478bc809
master date: 2021-11-22 12:27:30 +0000
xen/arch/x86/mm/p2m-pod.c