ARM-imx6-Adjust-DDR-DRAM-settings-on-DHCOM-i.MX6-PDK

ARM-imx6-Adjust-DDR-DRAM-settings-on-DHCOM-i.MX6-PDK

commit b979e35230042bfeadd5f4eddf66232f29e4bff4
Author: Marek Vasut <marex@denx.de>
Date:   Thu Nov 9 11:50:13 2017 +0100

    ARM: imx6: Adjust DDR DRAM settings on DHCOM i.MX6 PDK

    The board uses T-topology for the four x16 DRAM chips, so remove
    the write-leveling from the SPL as that is only usefly on fly-by
    topology and can be harmful on T-topology. Also update the DRAM
    timing with values from calibration on multiple boards.

    Signed-off-by: Marek Vasut <marex@denx.de>
    Cc: Stefano Babic <sbabic@denx.de>
Gbp-Pq: Topic upstream
Gbp-Pq: Name 0001-ARM-imx6-Adjust-DDR-DRAM-settings-on-DHCOM-i.MX6-PDK.patch