x86/msr: Drop {MISC_ENABLES,PLATFORM_INFO}.available
authorAndrew Cooper <andrew.cooper3@citrix.com>
Wed, 27 Jun 2018 11:34:47 +0000 (11:34 +0000)
committerAndrew Cooper <andrew.cooper3@citrix.com>
Mon, 2 Jul 2018 17:04:21 +0000 (18:04 +0100)
commit2df1d2ba132ff5e5d997af264f458c9182f08a26
tree1ccb21f0d27def42a865fd39129cad706d5e420c
parentd9e0cb858ebbb1003d926963d2d5e77ab30697ca
x86/msr: Drop {MISC_ENABLES,PLATFORM_INFO}.available

These MSRs are non-architectural and the available booleans were used in lieu
of an architectural signal of availability.

However, in hindsight, the additional booleans make toolstack MSR interactions
more complicated.  The MSRs are unconditionally available to HVM guests, but
currently for PV guests, are hidden when CPUID faulting is unavailable.
Instead, switch them to being unconditionally readable, even for PV guests.

The new behaviour is:
  * PLATFORM_INFO is unconditionally readable even for PV guests and will
    indicate the presence or absence of CPUID Faulting in bit 31.
  * MISC_FEATURES_ENABLES is unconditionally readable, and bit 0 may be set
    iff PLATFORM_INFO reports that CPUID Faulting is available.

As a minor bugfix, CPUID Faulting for HVM guests is not restricted to
Intel/AMD hardware.  In particular, VIA have a VT-x implementaion conforming
to the Intel specification.

Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Reviewed-by: Sergey Dyasli <sergey.dyasli@citrix.com>
Reviewed-by: Jan Beulich <jbeulich@suse.com>
Reviewed-by: Roger Pau Monné <roger.pau@citrix.com>
xen/arch/x86/cpu/common.c
xen/arch/x86/msr.c
xen/include/asm-x86/msr.h