[PATCH 2/2] x86/speculation: Add LFENCE to RSB fill sequence
authorPawan Gupta <pawan.kumar.gupta@linux.intel.com>
Tue, 2 Aug 2022 22:47:02 +0000 (15:47 -0700)
committerSalvatore Bonaccorso <carnil@debian.org>
Wed, 10 Aug 2022 18:11:48 +0000 (19:11 +0100)
commit241cc981fbe420fddf650b4dd8127c87eb62b3db
treedbe25b7f1fa48ce7c81e5d028ed8acafe2fc4d3c
parentf282d04310d9a2536045067d599e60ddcd8345d6
[PATCH 2/2] x86/speculation: Add LFENCE to RSB fill sequence

commit ba6e31af2be96c4d0536f2152ed6f7b6c11bca47 upstream.

RSB fill sequence does not have any protection for miss-prediction of
conditional branch at the end of the sequence. CPU can speculatively
execute code immediately after the sequence, while RSB filling hasn't
completed yet.

  #define __FILL_RETURN_BUFFER(reg, nr, sp)       \
          mov     $(nr/2), reg;                   \
  771:                                            \
          ANNOTATE_INTRA_FUNCTION_CALL;           \
          call    772f;                           \
  773:    /* speculation trap */                  \
          UNWIND_HINT_EMPTY;                      \
          pause;                                  \
          lfence;                                 \
          jmp     773b;                           \
  772:                                            \
          ANNOTATE_INTRA_FUNCTION_CALL;           \
          call    774f;                           \
  775:    /* speculation trap */                  \
          UNWIND_HINT_EMPTY;                      \
          pause;                                  \
          lfence;                                 \
          jmp     775b;                           \
  774:                                            \
          add     $(BITS_PER_LONG/8) * 2, sp;     \
          dec     reg;                            \
          jnz     771b;        <----- CPU can miss-predict here.

Before RSB is filled, RETs that come in program order after this macro
can be executed speculatively, making them vulnerable to RSB-based
attacks.

Mitigate it by adding an LFENCE after the conditional branch to prevent
speculation while RSB is being filled.

Suggested-by: Andrew Cooper <andrew.cooper3@citrix.com>
Signed-off-by: Pawan Gupta <pawan.kumar.gupta@linux.intel.com>
Signed-off-by: Borislav Petkov <bp@suse.de>
Signed-off-by: Daniel Sneddon <daniel.sneddon@linux.intel.com>
Gbp-Pq: Topic bugfix/x86/pbrsb
Gbp-Pq: Name 0002-x86-speculation-Add-LFENCE-to-RSB-fill-sequence.patch
arch/x86/include/asm/nospec-branch.h