x86/speculation/mds: Add mitigation mode VMWERV
authorThomas Gleixner <tglx@linutronix.de>
Wed, 20 Feb 2019 08:40:40 +0000 (09:40 +0100)
committerBen Hutchings <ben@decadent.org.uk>
Wed, 19 Jun 2019 22:16:58 +0000 (23:16 +0100)
commit232efc5f9753df31e9c30238cf41b3fb186dbedf
tree0d96dd3660a9c53403e5e68b584e6243bb9d8897
parent10f842c3a7524e8e11a22538e1b81208ed4c66a9
x86/speculation/mds: Add mitigation mode VMWERV

commit 22dd8365088b6403630b82423cf906491859b65e upstream

In virtualized environments it can happen that the host has the microcode
update which utilizes the VERW instruction to clear CPU buffers, but the
hypervisor is not yet updated to expose the X86_FEATURE_MD_CLEAR CPUID bit
to guests.

Introduce an internal mitigation mode VMWERV which enables the invocation
of the CPU buffer clearing even if X86_FEATURE_MD_CLEAR is not set. If the
system has no updated microcode this results in a pointless execution of
the VERW instruction wasting a few CPU cycles. If the microcode is updated,
but not exposed to a guest then the CPU buffers will be cleared.

That said: Virtual Machines Will Eventually Receive Vaccine

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Borislav Petkov <bp@suse.de>
Reviewed-by: Jon Masters <jcm@redhat.com>
Tested-by: Jon Masters <jcm@redhat.com>
Gbp-Pq: Topic bugfix/all/spec
Gbp-Pq: Name 0015-x86-speculation-mds-Add-mitigation-mode-VMWERV.patch
Documentation/x86/mds.rst
arch/x86/include/asm/processor.h
arch/x86/kernel/cpu/bugs.c