ARM: new VGIC: Add ENABLE registers handlers
authorAndre Przywara <andre.przywara@linaro.org>
Wed, 7 Feb 2018 15:51:12 +0000 (15:51 +0000)
committerStefano Stabellini <sstabellini@kernel.org>
Wed, 28 Mar 2018 18:13:35 +0000 (11:13 -0700)
commit1a87a4972d719d98d586f507b2542ab358843a67
tree69e43ea7d3e7ce680f510f4c60e393afa3679e10
parent1fbde30f5af6216241bd2cb4d65453cbac619534
ARM: new VGIC: Add ENABLE registers handlers

As the enable register handlers are shared between the v2 and v3
emulation, their implementation goes into vgic-mmio.c, to be easily
referenced from the v3 emulation as well later.
This introduces a vgic_sync_hardware_irq() function, which updates the
physical side of a hardware mapped virtual IRQ.
Because the existing locking order between vgic_irq->irq_lock and
irq_desc->lock dictates so, we drop the irq_lock and retake them in the
proper order.

Signed-off-by: Andre Przywara <andre.przywara@linaro.org>
Reviewed-by: Julien Grall <julien.grall@arm.com>
Acked-by: Stefano Stabellini <sstabellini@kernel.org>
xen/arch/arm/vgic/vgic-mmio-v2.c
xen/arch/arm/vgic/vgic-mmio.c
xen/arch/arm/vgic/vgic-mmio.h
xen/arch/arm/vgic/vgic.c
xen/arch/arm/vgic/vgic.h