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(parent: d9e49d1) | patch
AMD/IOMMU: enable x2APIC mode when available
authorJan Beulich <jbeulich@suse.com>
Wed, 31 Jul 2019 11:25:42 +0000 (13:25 +0200)
committerJan Beulich <jbeulich@suse.com>
Wed, 31 Jul 2019 11:25:42 +0000 (13:25 +0200)
commit0e8e0a0854a00d81267a5e9c9616a3fbd2729747
tree048ae7b9717fde449dea4689515f33386bc3cc24tree | snapshot
parentd9e49d1afe2ec45754734845f5c0fbc7effdd3d8commit | diff
AMD/IOMMU: enable x2APIC mode when available

In order for the CPUs to use x2APIC mode, the IOMMU(s) first need to be
switched into suitable state.

The post-AP-bringup IRQ affinity adjustment is done also for the non-
x2APIC case, matching what VT-d does.

Signed-off-by: Jan Beulich <jbeulich@suse.com>
Acked-by: Andrew Cooper <andrew.cooper3@citrix.com>
Acked-by: Brian Woods <brian.woods@amd.com>
xen/drivers/passthrough/amd/iommu_init.c diff | blob | history
xen/drivers/passthrough/amd/iommu_intr.c diff | blob | history
xen/drivers/passthrough/amd/pci_amd_iommu.c diff | blob | history
xen/include/asm-x86/hvm/svm/amd-iommu-proto.h diff | blob | history
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