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(parent: 6ce8724) | patch
x86emul: support MMX/SSE/SSE2 converts
authorJan Beulich <jbeulich@suse.com>
Tue, 7 Mar 2017 16:04:08 +0000 (17:04 +0100)
committerJan Beulich <jbeulich@suse.com>
Tue, 7 Mar 2017 16:04:08 +0000 (17:04 +0100)
commit0e14179881fcbb4534ed6baf462f3a3d54a4ad28
tree61beea1cc01b54cc78f3349ad5266dd20ec3c18dtree | snapshot
parent6ce8724d4da37ad2c6e0cff4ce9edf2568602025commit | diff
x86emul: support MMX/SSE/SSE2 converts

Note that other than most scalar instructions, vcvt{,t}s{s,d}2si do #UD
when VEX.l is set on at least some Intel models. To be on the safe
side, implement the most restrictive mode here for now when emulating
an Intel CPU, and simply clear the bit when emulating an AMD one.

Signed-off-by: Jan Beulich <jbeulich@suse.com>
Reviewed-by: Andrew Cooper <andrew.cooper3@citrix.com>
xen/arch/x86/x86_emulate/x86_emulate.c diff | blob | history
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