x86emul: support F16C insns
authorJan Beulich <jbeulich@suse.com>
Thu, 1 Feb 2018 10:29:39 +0000 (11:29 +0100)
committerJan Beulich <jbeulich@suse.com>
Thu, 1 Feb 2018 10:29:39 +0000 (11:29 +0100)
commit0af0e764852633ef5afda467c215621987262fb3
tree07e94edc82fb67f515dfb34e9510e2ce4d413a9c
parent9885e4d81ff27e51a221c7987cbc36c520cb0b21
x86emul: support F16C insns

Note that this avoids emulating the behavior of VCVTPS2PH found on at
least some Intel CPUs, which update MXCSR even when the memory write
faults.

Signed-off-by: Jan Beulich <jbeulich@suse.com>
Acked-by: Andrew Cooper <andrew.cooper3@citrix.com>
tools/tests/x86_emulator/test_x86_emulator.c
tools/tests/x86_emulator/x86-emulate.h
xen/arch/x86/x86_emulate/x86_emulate.c
xen/include/asm-x86/cpufeature.h