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ARM: new VGIC: Add SGIR register handler
authorAndre Przywara <andre.przywara@linaro.org>
Wed, 7 Feb 2018 17:07:22 +0000 (17:07 +0000)
committerStefano Stabellini <sstabellini@kernel.org>
Wed, 28 Mar 2018 18:17:21 +0000 (11:17 -0700)
commit08c688ca6422bba1ae90067a9c8ce622ffc0673a
tree39fccd67cd6dcca7a0d081ec19c4da7a1be6158etree | snapshot
parentc240e318617b923a6da1a0930fa473a739e8e314commit | diff
ARM: new VGIC: Add SGIR register handler

Triggering an IPI via this register is v2 specific, so the
implementation lives entirely in vgic-mmio-v2.c.

This is based on Linux commit 55cc01fb9004, written by Andre Przywara.

Signed-off-by: Andre Przywara <andre.przywara@linaro.org>
Reviewed-by: Julien Grall <julien.grall@arm.com>
Acked-by: Stefano Stabellini <sstabellini@kernel.org>
xen/arch/arm/vgic/vgic-mmio-v2.c diff | blob | history
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